
W742E/C813
4-BIT MICROCONTROLLER
Publication Release Date: December 2000
- 1 -
Revision A1
Table of Contents-
1.
2.
3.
4.
5.
GENERAL DESCRIPTION......................................................................................................................3
FEATURES .............................................................................................................................................3
PIN CONFIGURATION............................................................................................................................5
PIN DESCRIPTION.................................................................................................................................6
FUNCTIONAL DESCRIPTION................................................................................................................8
5.1
Program Counter (PC)..............................................................................................................8
5.2
Stack Register (STACK)...........................................................................................................8
5.3
Program Memory (ROM) ..........................................................................................................9
5.3.1
5.3.2
5.4
Data Memory (RAM)...............................................................................................................12
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
5.5
Accumulator (ACC).................................................................................................................16
5.6
Arithmetic and Logic Unit (ALU).............................................................................................16
5.7
Main Oscillator........................................................................................................................16
5.8
Sub-oscillator..........................................................................................................................17
5.9
Dividers...................................................................................................................................17
5.10
Dual-clock Operation..............................................................................................................17
5.11
Watchdog Timer (WDT) .........................................................................................................18
5.12
Timer/Counter.........................................................................................................................19
5.12.1
5.12.2
5.12.3
5.12.4
5.13
Interrupts ................................................................................................................................22
5.14
Stop Mode Operation .............................................................................................................24
5.14.1
5.15
Hold Mode Operation .............................................................................................................24
5.15.1
ROM Page Register (ROMPR).........................................................................................10
ROM Addressing Mode ....................................................................................................10
Architecture ......................................................................................................................12
RAM Page Register (PAGE).............................................................................................12
WR Page Register (WRP)................................................................................................13
Data Bank Register (DBKRH, DBKRL).............................................................................14
RAM Addressing Mode.....................................................................................................15
Timer 0 (TM0).................................................................................................................19
Timer 1 (TM1).................................................................................................................20
Mode Register 0 (MR0) ..................................................................................................22
Mode Register 1 (MR1) ..................................................................................................22
Stop Mode Wake-up Enable Flag for RC and RD Port (SEF)........................................24
Hold Mode Release Enable Flag (HEF, HEFD)..............................................................26