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參數(shù)資料
| 型號： | W83194R-67A |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | XO, clock |
| 英文描述： | 100MHZ 3-DIMM CLOCK FOR VIA MVP4 |
| 中文描述： | 124 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數(shù)： | 1/18頁 |
| 文件大小： | 237K |
| 代理商： | W83194R-67A |
W83194R-67A
100MHZ 3-DIMM CLOCK FOR VIA MVP4
Publication Release Date: Feb. 1999
Revision 0.30
- 1 -
1.0 GENERAL DESCRIPTION
The W83194R-67A is a Clock Synthesizer which provides all clocks required for high-speed RISC or
CISC microprocessor such as Intel Pentium , AMD and Cyrix. W83194R-67A provides sixteen
CPU/PCI frequencies which are externally selectable with smooth transitions. W83194R-67AA also
provides 13 SDRAM clocks controlled by the none-delay buffer_in pin.
The W83194R-67A accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply.
Spread spectrum built in at
ó
0.5% or
ó
0.25% to reduce EMI. Programmable stopping individual
clock outputs and frequency selection through I
2
C interface. The device meets the Pentium power-up
stabilization, which requires CPU and PCI clocks be stable within 2 ms after power-up.
High drive six PCI and thirteen SDRAM CLOCK outputs typically provide greater than 1 V /ns slew
rate into 30 pF loads. Two CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20
pF loads as maintaining 50
ó
5% duty cycle. The fixed frequency outputs as REF, 24MHz, and 48
MHz provide better than 0.5V /ns slew rate.
2.0 PRODUCT FEATURES
Supports Pentium
, AMD, Cyrix CPU with I
2
C.
4 CPU clocks (one free-running CPU clock)
13 SDRAM clocks for 3 DIMs
6 PCI synchronous clocks
Optional single or mixed supply:
(Vddq1=Vddq2 = Vddq3 = Vddq4 = VddL1 =VddL2= 3.3V) or (Vddq1= Vddq2 = Vddq3=Vddq4 =
3.3V, VddL1 = VdqL2 = 2.5V)
< 250ps skew among CPU and SDRAM clocks
< 4ns propagation delay SDRAM from buffer input
Skew from CPU(earlier) to PCI clock -1 to 4ns, center 2.6ns.
Smooth frequency switch with selections from 60 MHz to 124 MHz CPU
I
2
C 2-Wire serial interface and I
2
C read back
ó
0.25% or
ó
0.5% spread spectrum function to reduce EMI
Programmable registers to enable/stop each output and select modes
(mode as Tri-state or Normal )
2ms power up clock stable time
MODE pin for power Management
One 48 MHz for USB & one 24 MHz for super I/O
48-pin SSOP package
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W83194R-67B | 100MHZ 3-DIMM Clock For Via MVP4(用于主流通路芯片組的頻率為100MHZ的三雙列直插存儲模塊式時鐘) |
| W83194R | 166MHZ CLOCK FOR SIS CHIPSET |
| W83194R-630A | 166MHZ CLOCK FOR SIS CHIPSET |
| W83195AR-25 | 200MHZ 3-DIMM CLOCK FOR SOLANO CHIPSET |
| W83195BR-S | STEPLESS 200MHZ 3-DIMM CLOCK FOR SOLANO CHIPSET |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W83194R-67A/-67B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:133MHz(Adding 97MHz) VIA MVP4 Clock Gen.. 3-DIMM. with S.S.T. |
| W83194R-67B | 制造商:WINBOND 制造商全稱:Winbond 功能描述:100MHZ 3-DIMM CLOCK FOR VIA MVP4 |
| W83194R-81 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:100MHZ CLOCK FOR SIS CHIPSET |
| W83194R-KX | 制造商:WINBOND 制造商全稱:Winbond 功能描述:133MHZ 3-DIMM K7 CLOCK |
| W83194R-WE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU SYSTEM CLOCK GENERATOR|CMOS|SSOP|48PIN|PLASTIC |
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