
W942516CH
4M
×
4 BANKS
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16 BIT DDR SDRAM
Publication Release Date: May 20, 2003
- 1 -
Revision A2
Table of Contents-
1.
2.
3.
4.
5.
6.
7.
GENERAL DESCRIPTION ......................................................................................................... 3
FEATURES................................................................................................................................. 3
KEY PARAMETERS................................................................................................................... 4
PIN CONFIGURATION............................................................................................................... 5
PIN DESCRIPTION..................................................................................................................... 6
BLOCK DIAGRAM...................................................................................................................... 7
ELECRICAL CHARACTERISTICS............................................................................................. 8
7.1
Absolute Maximum Ratings .................................................................................................8
7.2
Recommended DC Operating Conditions............................................................................8
7.3
Capacitance.........................................................................................................................9
7.4
Leakage and Output Buffer Characteristics.........................................................................9
7.5
DC Characteristics.............................................................................................................10
7.6
AC Characteristics and Operating Condition .....................................................................11
7.7
AC Test Conditions............................................................................................................13
OPERATION MODE.................................................................................................................15
8.1
Simplified Truth Table........................................................................................................15
8.2
Function Truth Table..........................................................................................................16
8.3
Function Truth Table for CKE ............................................................................................19
8.4
Simplified Stated Diagram..................................................................................................20
FUNCTIONAL DESCRIPTION.................................................................................................. 21
9.1
Power Up Sequence..........................................................................................................21
9.2
Command Function............................................................................................................21
9.3
Read Operation..................................................................................................................24
9.4
Write Operation..................................................................................................................24
9.5
Precharge...........................................................................................................................24
9.6
Burst Termination...............................................................................................................25
9.7
Refresh Operation..............................................................................................................25
9.8
Power Down Mode.............................................................................................................25
9.9
Mode Register Operation...................................................................................................25
TIMING WAVEFORMS............................................................................................................. 29
10.1
Command Input Timing......................................................................................................29
10.2
Timing of the CLK Signals..................................................................................................29
8.
9.
10.