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參數資料
| 型號： | W981204AH-75 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | DRAM |
| 英文描述： | 32M X 4 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| 封裝： | 0.400 INCH, 0.80 MM PITCH, TSOP2-54 |
| 文件頁數： | 1/42頁 |
| 文件大小： | 1082K |
| 代理商： | W981204AH-75 |
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W981204AH
8M x 4 Banks x 4 bits SDRAM
Revision 1.0
Publication Release Date: June, 2000
- 1 -
Features
3.3V ± 0.3V power supply
Up to 133 MHz clock frequency
8,388,608 words x 4 banks x 4 bits organization
Auto Refresh and Self Refresh
CAS latency: 2 and 3
Burst Length: 1, 2, 4, 8, and full page
Burst read, Single Writes Mode
Byte data controlled by DQM
Power-Down Mode
Auto-Precharge and controlled precharge
4K refresh cycles / 64ms
Interface: LVTTL
Package: TSOP II 54 pin, 400 mil - 0.80
General Description
W981204AH is a high-speed synchronous dynamic random access memory (SDRAM), organized as 8M words x 4 banks
x 4 bits. Using pipelined architecture and 0.20um process technology, W981204AH delivers a data bandwidth of up to 133M
(-75) words per second. To fully comply with the personal computer industrial standard, W981204AH is sorted into two speed
grades: -75 and -8H. The -75 is compliant to the PC133/CL3 specification. The -8H is compliant to the PC100/CL2
specification.
Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of
1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically
generated by the SDRAM internal counter in burst operation. Random column read is also possible by providing its address at
each clock cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time.
By having a programmable Mode Register, the system can change burst length, latency cycle, interleave or sequential
burst to maximize its performance. W981204AH is ideal for main memory in high performance applications.
Key Parameters
Symbol
Description
min/max
-75 (PC133)
-8H (PC100)
tCK
Clock Cycle Time
min
7.5ns
8ns
tAC
Access Time from CLK
max
5.4ns
6ns
tRP
Precharge to Active Command
min
20ns
tRCD
Active to Read/Write Command
min
20ns
ICC1
Operation Current ( Single bank )
max
85mA
80mA
ICC4
Burst Operation Current
max
120mA
110mA
ICC6
Self-Refresh Current
max
2mA
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相關代理商/技術參數 |
參數描述 |
|---|---|
| W981204AH-8H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SDRAM |
| W981208AH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:4M x 8 bit x 4 Banks SDRAM |
| W981208AH-75 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:x8 SDRAM |
| W981208AH-8H | 制造商:WINBOND 制造商全稱:Winbond 功能描述:x8 SDRAM |
| W981208BH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:4M x 4 BANKS x 8 BIT SDRAM |
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