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參數資料
| 型號： | WCMA2016U4X |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 128K x 16 STATIC RAM |
| 中文描述： | 128K的× 16靜態RAM |
| 文件頁數： | 1/11頁 |
| 文件大小： | 297K |
| 代理商： | WCMA2016U4X |
128K x 16 Static RAM
WCMA2016U4X
WCMA2016U4X
Features
Low Voltage range:
— 2.7V-3.3V
Ultra-low active power
— Typical active current: 1.5 mA @ f = 1MHz
— Typical active current: 7 mA @ f = fmax
Low standby power
Easy memory expansion with CE and OE features
Automatic power-down when deselected
CMOS for optimum speed/power
Functional Description
The WCMA2016U4X is a high-performance CMOS static
RAMs organized as 128K words by 16 bits. These devices
feature advanced circuit design to provide ultra-low active cur-
rent. This device is ideal for portable applications such as cel-
lular telephones. The devices also have an automatic pow-
er-down feature that significantly reduces power consumption
by 80% when addresses are not toggling. The device can also
be put into standby mode reducing power consumption by
more than 99% when deselected (CE HIGH or both BLE and
BHE are HIGH). The input/output pins (I/O0 through I/O15) are
placed in a high-impedance state when: deselected (CE
HIGH), outputs are disabled (OE HIGH), both Byte High En-
able and Byte Low Enable are disabled (BHE, BLE HIGH), or
during a write operation (CE LOW, and WE LOW).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is
written into the location specified on the address pins (A0
through A16). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O8 through I/O15) is written into the location
specified on the address pins (A0 through A16).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O8 to I/O15. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
The WCMA2016U4X is available in a 48-ball FBGA package.
Logic Block Diagram
128K x 16
RAM Array
I/O0 – I/O7
ROW
DE
CODE
R
A8
A7
A6
A5
A2
COLUMN DECODER
A
11
A
12
A
13
A
14
A
15
2048 x 1024
S
E
N
S
E
AM
PS
DATA IN DRIVERS
OE
A4
A3
I/O8 – I/O15
CE
WE
BLE
BHE
A
16
A0
A1
A9
Power
-Down
Circuit
BHE
BLE
CE
A10
10
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相關代理商/技術參數 |
參數描述 |
|---|---|
| WCMA2016U4X-FF55 | 制造商:Cypress Semiconductor 功能描述: |
| WCMA2016U4X-FF70 | 制造商:Cypress Semiconductor 功能描述: |
| WCMA4008C1X | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:512K x 8 Static RAM |
| WCMA4008C1X-GF70 | 制造商:Cypress Semiconductor 功能描述: |
| WCMA4016U1X | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:256K x 16 Static RAM |
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