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參數資料
| 型號： | WED3DL644V7BC |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | DRAM |
| 英文描述： | 4M X 64 SYNCHRONOUS DRAM, 5.4 ns, PBGA153 |
| 封裝： | 17 X 23 MM, BGA-153 |
| 文件頁數： | 1/28頁 |
| 文件大小： | 918K |
| 代理商： | WED3DL644V7BC |
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White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED3DL644V
August 2005
Rev. 6
12
3
4
5
6
7
8
9
A
DQ41
DQ43
DQ45
DQ47
NC
DQ48
DQ50
DQ52
DQ54
B
DQ40
DQ42
DQ44
DQ46
NC
DQ49
DQ51
DQ53
DQ55
C
DQ33
DQ35
DQ37
DQ39
NC
DQ56
DQ58
DQ60
DQ62
D
DQ32
DQ34
DQ36
DQ38
NC
DQ57
DQ59
DQ61
DQ63
E
NC
DQML2 DQMH2
VCC
DQML3 DQMH3
NC
F
NC
VCCQ
VCC
VCCQ
A3
G
CE2#
CE3#
VSS
A4
A2
H
NC
VSS
CK1
VSS
A5
A1
J
NC
CKE
CAS#
RAS#
WE#
A9
A11
A6
A0
K
NC
VSS
CK0
VSS
A7
A10
L
CE1#
CE0#
VSS
A8
BA1
M
NC
VCCQ
VCC
VCCQ
BA0
N
NC
DQMH1 DQML1
VCC
DQMH0 DQML0
NC
P
DQ30
DQ28
DQ26
DQ24
NC
DQ06
DQ04
DQ02
DQ00
R
DQ31
DQ29
DQ27
DQ25
NC
DQ07
DQ05
DQ03
DQ01
T
DQ22
DQ20
DQ18
DQ16
NC
DQ14
DQ12
DQ10
DQ08
U
DQ23
DQ21
DQ19
DQ17
NC
DQ15
DQ13
DQ11
DQ09
A0 – A11
Address Bus
BA0-1
Bank Select Addresses
DQ0-63
Data Bus
CK0-1
Clock
CKE
Clock Enable
DQML0-3
DQMH0-3
Data Input/Output Masks
RAS#
Row Address Strobe
CAS#
Column Address Strobe
WE#
Write Enable
CE0-3#
Chip Enables
VCC
Power Supply pins, 3.3V
VCCQ
Data Bus Power Supply, 3.3V
VSS
Ground pins
4Mx64 SDRAM
53% Space Savings vs. Monolithic Solution
Reduced System Inductance and Capacitance
3.3V Operating Supply Voltage
Fully Synchronous to Positive Clock Edge
Clock Frequencies of 133, 125 and 100MHZ
Burst Operation
Sequential or Interleaved
Burst Length = Programmable 1, 2, 4, 8 or Full
Page
Burst Read and Write
Multiple Burst Read and Single Write
Data Mask Control Per Byte
Auto and Self Refresh
Automatic and Controlled Precharge Commands
Suspend Mode and Power Down Mode
17mm x 23mm, 153 BGA
The WED3DL644V is a 4Mx64 Synchronous DRAM
congured as 4x1Mx64. The SDRAM BGA is constructed
with four 4Mx16 SDRAM die mounted on a multi-layer
laminate substrate and packaged in a 153 lead, 17mm by
23mm, BGA.
The WED3DL644V is available in clock speeds of 133MHZ,
125MHZ and 100MHZ. The range of operating frequencies,
programmable burst lengths and programmable latencies
allow the same device to be useful for a variety of
high bandwidth, high performance memory system
applications.
The package and design provides performance
enhancements via a 50% reduction in capacitance vs.
four monolithic devices. The design includes internal ground
and power planes which reduces inductance on the ground
and power pins allowing for improved decoupling and a
reduction in system noise.
This product is subject to change without notice.
PIN DESCRIPTION
PINOUT (TOP VIEW)
DESCRIPTION
FEATURES
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相關代理商/技術參數 |
參數描述 |
|---|---|
| WED3DL644V7BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:4Mx64 SDRAM |
| WED3DL644V8BC | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:4Mx64 SDRAM |
| WED3DL644V8BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:4Mx64 SDRAM |
| WED3DL644V-BC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM MCP |
| WED3EG6417S202D4 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:128MB - 16Mx64 DDR SDRAM UNBUFFERED |
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