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參數(shù)資料
| 型號(hào)： | WED3EG72M18S202JD3SG |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | DRAM |
| 英文描述： | 16M X 72 DDR DRAM MODULE, 0.75 ns, DMA184 |
| 封裝： | ROHS COMPLIANT, DIMM-184 |
| 文件頁(yè)數(shù)： | 1/12頁(yè) |
| 文件大小： | 245K |
| 代理商： | WED3EG72M18S202JD3SG |
PRELIMINARY*
1
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
June 2006
Rev. 2
WED3EG7218S-JD3
FEATURES
Double-data-rate architecture
DDR200, DDR266, DDR333 and DDR400
JEDEC design specied
BI-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2.5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input.
Auto and self refresh
Serial presence detect
Power supply:
VCC = VCCQ = 2.5V±0.2V
(100, 133 and 166MHz)
VCC = VCCQ = 2.6V±0.1V
(200MHz)
JEDEC 184 pin DIMM package
JD3 PCB height: 30.48 (1.20") Max
NOTE: Consult factory for availability of:
RoHS Products
Vendor source control options
Industrial temperature option
128MB – 16Mx72 DDR SDRAM UNBUFFERED
DESCRIPTION
The WED3EG7218S is a 16Mx72 Double Data Rate
SDRAM memory module based on 128Mb DDR SDRAM
component. The module consists of nine 16Mx8 DDR
SDRAMs in 66 pin TSOP packages mounted on a 184
pin FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible on
both edges and Burst Lengths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
* This product is under development, is not qualied or characterized and is subject to
change without notice.
OPERATING FREQUENCIES
DDR400 @CL=3
DDR333 @CL=2.5
DDR266 @CL=2
DDR266 @CL=2.5
DDR200 @CL=2
Clock Speed
200MHz
166MHz
133MHz
100MHz
CL-tRCD-tRP
3-3-3
2.5-3-3
2-2-2
2.5-3-3
2-2-2
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