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參數資料
| 型號： | WF2M16-XXX5 |
| 英文描述： | 2Mx16 Flash Module(1Mx32 3.3V閃速存儲器模塊) |
| 中文描述： | 2Mx16閃存模塊（1Mx32 3.3閃速存儲器模塊） |
| 文件頁數： | 1/12頁 |
| 文件大小： | 139K |
| 代理商： | WF2M16-XXX5 |
1
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
HI-RELIABILITY PRODUCT
WF2M16-XXX5
November 1999 Rev. 3
2Mx16 FLASH MODULE, SMD 5962-97610
(pending)
PRELIMINARY*
FEATURES
I
Access Times of 90, 120, 150ns
I
Packaging:
56 lead, Hermetic Ceramc, 0.520" CSOP (Package 207).
Fits standard 56 SSOP footprint.
44 pin Ceramc SOJ (Package 102)**
44 lead Ceramc Flatpack (Package 208)**
I
Sector Architecture
32 equal size sectors of 64KBytes each
Any combination of sectors can be erased. Also supports
full chip erase.
I
Minimum100,000 Write/Erase Cycles Minimum
I
Organized as 2Mx16; User Configurable as 2 x 2Mx8
I
Commercial, Industrial, and Military Temperature Ranges
I
5 Volt Read and Write. 5V
±
10% Supply.
I
Low Power CMOS
I
Data Polling and Toggle Bit feature for detection of program
or erase cycle completion.
I
Supports reading or programmng data to a sector not being
erased.
I
Built-in Decoupling Caps and Multiple Ground Pins for Low
Noise Operation.
I
RESET pin resets internal state machine to the read mode.
I
Ready/Busy (RY/BY) output for detection of programor
erase cycle completion.
I
Multiple Ground Pins for Low Noise Operation
* Ths data sheet describes a product under development, not fuly
characterized andis subect to change without notice.
** Package to be developed
Note: For programmng informationrefer to FlashProgrammng 16M5
AppicationNotes.
FIG. 1
PIN CONFIGURATIONS
PIN DESCRIPTION
I/O
0-15
Data Inputs/Outputs
A
0-20
Address Inputs
WE
Write Enable
CS
1-2
Chip Select
OE
Output Enable
V
CC
Power Supply
V
SS
Ground
RY/BY
Ready/Busy
RESET
Reset
BLOCK DIAGRAM
I/O
0-7
NOTE:
1. RY/BY is an open drain output and should be pulled up to Vcc
with an external resistor.
2. Address compatible with Intel 2M8 56 SSOP.
TOP VIEW
WF2M16-XDAX5
56 CSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
CS1
A12
A13
A14
A15
NC
CS2
NC
A20
A19
A18
A17
A16
V
CC
GND
I/O6
I/O14
I/O7
I/O15
RY/BY
OE
WE
NC
I/O13
I/O5
I/O12
I/O4
V
CC
NC
RESET
A11
A10
A9
A1
A2
A3
A4
A5
A6
A7
GND
A8
V
CC
I/O9
I/O1
I/O8
I/O0
A0
NC
NC
NC
I/O2
I/O10
I/O3
I/O11
GND
2M x 8
2M x 8
A
0-20
RY/BY
WE
CS
1
CS
2
I/O
8-15
RESET
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
A15
A14
A13
A12
A11
A10
A9
A8
RESET
CS1
V
CC
V
SS
CS2
RY/BY
A7
A6
A5
A4
A3
A2
A1
A0
A16
A17
A18
A19
A20
OE
I/O7
I/O6
I/O5
I/O4
V
SS
V
CC
I/O3
I/O2
I/O1
I/O0
WE
NC
NC
NC
NC
NC
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
WF2M16-XXX5
44 CSOJ (DL)**
44 FLATPACK (FL)**
** Package to be developed
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