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參數(shù)資料
| 型號： | WI125 EVAL KIT |
| 廠商： | Connor-Winfield |
| 文件頁數(shù)： | 2/18頁 |
| 文件大小： | 0K |
| 描述： | GPS TIMING RECEIVER EVAL BOARD |
| 產(chǎn)品培訓(xùn)模塊： | 125 Series GPS Based Timing and Synchronization Products |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 計時，時鐘發(fā)生器，同步器，GPS |
| 嵌入式： | 否 |
| 已用 IC / 零件： | WI125 |
| 主要屬性： | 1PPS/ 10 MHz 相位校準(zhǔn)功能 |
| 次要屬性： | LED 狀態(tài)指示器 |
| 已供物品： | 模塊，板，天線，線纜，電源 |
| 其它名稱： | CW681 W125 EVAL KIT |
Wi125 Data Sheet #:
SG170
Page 10 of 20
Rev:
04
Date:
11/29/11
Copyright 2011 The Connor-Winfield Corp. All Rights Reserved
Specifications subject to change without notice
VBATT
Type:Power
Direction:Input/Output
Pin:27
TheBatteryBackupSupply.TheWi125hasanonboardRealTimeClock(RTC).Thisis
poweredfromtheVBATTsignal.Asupplyoftypically3v(greaterthan2.5Vandlessthan
DIG_3V3)shouldbeappliedtothissignal.Thissignalcanbeleftfloatingifnotrequired.
Theinputhasablockingdiodeandsorechargeablebatterieswillneedanexternalcharg-
ingcircuit.Typically,a1Kresisterinserieswiththissignalandtheexternalbatterywill
provideaneasymethodofmeasuringthecurrentconsumptionfromVBATTduringtest.
4.2 RF Signals
RF_IN
Type:RF
Direction:Input
Pin:24
TheRFInputSignal.ThisattachestotheGPSantenna.StandardRFdesignrulesmust
beusedwhentrackingtothissignal.ThissignalhasanRFblockedconnectiontothe
ANT_SUPPLYsignal.ThisisthesamesignalpresentedontheRFconnectoronthe
Wi125.Onlyoneantennaconnectionshouldbemade.IftheRFconnectoristobeused,
thenthereshouldbenoconnection,evenanunconnectedpad,tothiscastellation.
TRIM
Type:RF
Direction:Input
Pin:12
ThissignaltrimstheoutputfrequencyoftheVCTCXO.Thissignalisnormallyleftopen.
Whenfloating,thissignalisbiasedtothecontrolvoltageoftheVCTCXO.Anynoisein-
jectedintothissignalwillseverelycompromisetheperformanceoftheWi125.Thissignal
shouldonlybeusedinconjunctionwithspecificapplicationnotes.
EXT_CLK
Type:RF
Direction:Input
Pin:7
Thisinputistheexternalclockinput.Thissignalistobeusedonlyinspecialbuildsof
theWi125thatarenotfittedwithaninternalVCTCXO.Forthenormalbuild,containing
theVCTCXO,donotconnectthisinput.Theexternalclockisa9MHzto26MHzclipped
sinewaveinputwithanamplitudebetween1Vand3Vpeaktopeak.Thereturnpathfor
thissignalisRF_GND.
4.3 Emulation/Test Signals
TDI
Type:Test
Direction:Input
Pin:14
TheTestDataInSignal.ThisisthestandardJTAGtestdatainput.Thesignalreturnpath
isDIG_GND.
TDO
Type:Test
Direction:Output
Pin:13
TheTestDataOutSignal.ThisisthestandardJTAGtestdataoutput.Thesignalreturn
pathisDIG_GND.
TCK
Type:Test
Direction:Input
Pin:20
TheTestClockSignal.ThisisthestandardJTAGtestclockinput.Thesignalreturnpathis
DIG_GND.
4 SIGNAL DESCRIPTION continued
4.1 Power Signals cont’d
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