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參數(shù)資料
| 型號： | WM2604IDT |
| 廠商： | Wolfson Microelectronics |
| 英文描述： | Quad 10-Bit Serial Input Voltage Output DAC |
| 中文描述： | 四路10位串行輸入電壓輸出DAC |
| 文件頁數(shù)： | 1/10頁 |
| 文件大小： | 103K |
| 代理商： | WM2604IDT |
WM2604
Quad 10-Bit Serial Input Voltage Output DAC
Production Data, June 1999, Rev 1.0
WOLFSON MICROELECTRONICS LTD
Lutton Court, Bernard Terrace, Edinburgh, EH8 9NX, UK
Tel: +44 (0) 131 667 9386
Fax: +44 (0) 131 667 5176
Email: sales@wolfson.co.uk
http://www.wolfson.co.uk
Production Data
Datasheets
contain final
specifications current on publication date.
Supply of products conforms to Wolfson
Microelectronics' Terms and Conditions.
1999 Wolfson Microelectronics Ltd
.
FEATURES
Four 10-bit voltage output DACs
Dual 2.7V to 5.5V supply (separate digital and analogue
supplies)
DNL
±
0.1 LSB, INL
±
0.4 LSB
Low power consumption:
-
5.5mW, slow mode - 5V supply
-
3.3mW, slow mode - 3V supply
TMS320, (Q)SPI
, and Microwire
compatible serial
interface
Programmable settling time of 4
μ
s or 12
μ
s typical
APPLICATIONS
Battery powered test instruments
Digital offset and gain adjustment
Battery operated/remote industrial controls
Machine and motion control devices
Wireless telephone and communication systems
Speech synthesis
Arbitrary waveform generation
ORDERING INFORMATION
DEVICE
TEMP. RANGE
PACKAGE
WM2604CDT
0° to 70°C
16-pin TSSOP
WM2604IDT
-40° to 85°C
16-pin TSSOP
DESCRIPTION
The WM2604 is a quadruple 10-bit voltage output, resistor string,
digital-to-analogue converter. Each DAC can be individually
powered down under software control. A hardware controlled mode
is provided that powers down all DACs. Power down reduces
current consumption to 10nA.
The device has been designed to interface efficiently to industry
standard microprocessors and DSPs, including the TMS320
family. The WM2604 is programmed with a 16-bit serial word
comprising of a DAC address, individual DAC control bits and a
10-bit value.
The WM2604 has provision for two supplies: one supply for the
serial interface (DVDD, DGND), and one for the DACs, reference
buffers and output buffers (AVDD, AGND). This enables a typical
application where the device can be controlled via a
microprocessor operating on a 3V supply, with the DACs operating
on a 5V supply. Alternatively, the supplies can be tied together in a
single supply application.
Excellent performance is delivered with a typical DNL of
±
0.1 LSB.
The settling time of the DAC is programmable to allow the designer
to optimize speed versus power dissipation. The output stage is
buffered by a x2 gain near rail-to-rail amplifier, which features a
Class AB output stage. DACs A and B can have a different
reference voltage to DACs C and D.
The device is available in a 16-pin TSSOP package. Commercial
temperature (0
°
to 70
°
C) and Industrial temperature (-40
°
to 85
°
C)
variants are supported.
BLOCK DIAGRAM
TYPICAL PERFORMANCE
(11) OUTD
(12) OUTC
(13) OUTB
(14) OUTA
12-BIT
DATA AND
CONTROL
HOLDING
LATCH
10-BIT
DAC
LATCH
16-BIT
SHIFT
REGISTER
AND
CONTROL
LOGIC
REFINAB (15)
REFINCD (10)
POWER-ON
RESET
DIN (4)
FS (7)
SCLK (5)
NCS (6)
(9)
AGND
(8)
DGND
(3)
NLDAC
(2)
NPD
AVDD
(16)
DVDD
(1)
X2
DAC A
DAC C
DAC D
POWERDOWN/
SPEED
CONTROL
WM2604
2-BIT
CONTROL
LATCH
DAC B
X1
DAC
OUTPUT
BUFFER
data
REFERENCE
INPUT BUFFER
AVDD = DVDD =5V, V
REF
= 2.048V, Speed = Fast mode, Load = 10k/100pF
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
0
256
512
767
1023
CODE
D
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相關代理商/技術參數(shù) |
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