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參數(shù)資料
| 型號(hào)： | WS1M8-55FM |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | SRAM |
| 英文描述： | 1M X 8 STANDARD SRAM, 55 ns, CDFP36 |
| 封裝： | CERAMIC, DFP-36 |
| 文件頁(yè)數(shù)： | 1/2頁(yè) |
| 文件大小： | 373K |
| 代理商： | WS1M8-55FM |
1
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WS1M8-XXX
July 2004
Rev. 5
White Electronic Designs Corp. reserves the right to change products or specications without notice.
2x512Kx8 DUALITHIC SRAM
FEATURES
Access Times 17, 20, 25, 35, 45, 55ns
Revolutionary, Center Power/Ground Pinout
Packaging:
32 pin, Hermetic Ceramic DIP (Package 300)
36 lead Ceramic SOJ (Package 100)
36 lead Ceramic Flatpack (Package 226)
36 CSOJ
36 FLATPACK
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
A0
A1
A2
A3
A4
CS1#
I/O0
I/O1
VCC
GND
I/O2
I/O3
WE#
A5
A6
A7
A8
A9
NC
A18
A17
A16
A15
OE#
I/O7
I/O6
GND
VCC
I/O5
I/O4
A14
A13
A12
A11
A10
CS2#
Block Diagram
512K x 8
A0-18
OE#
WE#
CS1#
CS2#
I/O0-7
(1)
PIN CONFIGURATION FOR WS1M8-XDJX
AND WS1M8-XFX
Pin Description
A0-18
Address Inputs
I/O0-7
Data Input/Output
CS1-2#
Chip Selects
OE#
Output Enable
WE#
Write Enable
VCC
+5.0V Power
GND
Ground
NOTE:
1. CS1# and CS2# are used to select the lower and upper 512Kx8 of the device. CS1# and CS2# must not be enabled at the same time.
Organized as two banks of 512Kx8
Commercial, Industrial and Military Temperature Ranges
5 Volt Power Supply
Low Power CMOS
TTL Compatible Inputs and Outputs
PIN CONFIGURATION FOR WS1M8-XCX
32 DIP
TOP VIEW
512K x 8
A0-18
WE#
CS 1#
CS 2#
I/O0-7
(1)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
VCC
A15
A17
WE#
A13
A8
A9
A11
CS2#
A10
CS1#
I/O7
I/O6
I/O5
I/O4
I/O3
Pin Description
A0-18
Address Inputs
I/O0-7
Data Input/Output
CS1-2#
Chip Selects
WE#
Write Enable
VCC
+5.0V Power
GND
Ground
Block Diagram
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