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參數(shù)資料
型號: WS1M8V-17CM
廠商: MICROSEMI CORP-PMG MICROELECTRONICS
元件分類: SRAM
英文描述: 1M X 8 STANDARD SRAM, 17 ns, CDIP32
封裝: 0.600 INCH, HERMETIC SEALED, SIDE BRAZED, CERAMIC, DIP-32
文件頁數(shù): 1/5頁
文件大小: 319K
代理商: WS1M8V-17CM
WS1M8V-XCX
1
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
October, 2002
Rev. 2
White Electronic Designs Corp. reserves the right to change products or specications without notice.
ADVANCED*
2x512Kx8 DUALITHIC SRAM
FEATURES
Access Times 17, 20, 25, 35, 45, 55ns
Evolutionary, Corner Power/Ground Pinout
Packaging:
32 pin, Hermetic Ceramic DIP (Package 300)
Organized as two banks of 512Kx8
Commercial, Industrial and Military Temperature
Ranges
3.3V Power Supply
Low Power CMOS
TTL Compatible Inputs and Outputs
Output Enable Internally tied to GND.
* This product is under development, is not qualied or characterized and is subject to
change or cancellation without notice.
NOTE:
1. CS#1 and CS#2 are used to select the lower and upper 512Kx8 of the
device. CS#1 and CS#2 must not be enabled at the same time.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
VCC
A15
A17
WE#
A13
A8
A9
A11
CS2#
A10
CS1#
I/O7
I/O6
I/O5
I/O4
I/O3
PIN CONFIGURATION FOR WS1M8V-XCX
32 DIP
TOP VIEW
BLOCK DIAGRAM
512K x 8
A0-18
WE#
CS1#
CS2#
I/O0-7
(1)
A0-18
Address Inputs
I/O0-7
Data Input/Output
CS#1-2
Chip Selects
WE#
Write Enable
VCC
+3.3V Power Supply
GND
Ground
PIN DESCRIPTION
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