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參數資料
| 型號： | WSF41632-22XX |
| 英文描述： | 128KX32 SRAM & 512Kx32 FLASH MIXED MODULE |
| 中文描述： | 128KX32的SRAM |
| 文件頁數： | 1/14頁 |
| 文件大小： | 537K |
| 代理商： | WSF41632-22XX |
WSF41632-22XX
PRELIMINARY*
1
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
October, 2002
Rev. 4
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
128K
X
32 SRAM & 512Kx32 FLASH MIXED MODULE
FEATURES
Access times of 25ns (SRAM) and 120ns (FLASH)
Packaging
66 pin, PGA Type, 1.385" square HIP, hermetic
ceramic HIP (Package 402)
68 lead, hermetic CQFP (G2T), 22.4mm (0.880")
square (Package 509) 4.57mm (0.180") height
Designed to fit JEDEC 68 lead 0.990" CQFJ
footprint (FIGURE 2). Package to be developed.
128Kx32 SRAM
512Kx32 5V Flash
Organized as 128Kx32 of SRAM and 512Kx32 of
Flash Memory with common data bus
Low power CMOS
Commercial, industrial and military temperature
ranges
TTL compatible inputs and outputs
Built-in decoupling caps and multiple ground pins
for low noise operation
Weight - 13 grams typical
FLASH MEMORY FEATURES
100,000 erase/program cycles minimum
Sector architecture
8 equal size sectors of 64KBytes each
Any combination of sectors can be concurrently
erased. Also supports full chip erase
5V programming; 5V ± 10% supply
Embedded erase and program algorithms
Hardware write protection
Page program operation and internal program
control time.
Note: For programming information refer to flash programming 4M5 application note.
* This product is under development, is not qualified or characterized and is subject to
change without notice.
I/O
8
I/O
9
I/O
10
A
14
A
16
A
11
A
0
A
18
I/O
0
I/O
1
I/O
2
FWE
2
#
SWE
2
#
GND
I/O
11
A
10
A
9
A
15
V
CC
FCS#
SCS#
I/O
3
I/O
15
I/O
14
I/O
13
I/O
12
OE#
A
17
FWE
1
#
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
7
A
12
SWE
1
#
A
13
A
8
I/O
16
I/O
17
I/O
18
V
CC
SWE
4
#
FWE
4
#
I/O
27
A
4
A
5
A
6
FWE
3
#
SWE
3
#
GND
I/O
19
I/O
31
I/O
30
I/O
29
I/O
28
A
1
A
2
A
3
I/O
23
I/O
22
I/O
21
I/O
20
11 22 33 44 55 66
1 12 23 34 45 56
PIN CONFIGURATION FOR WSF41632-22H2X
Block Diagram
Pin Description
D0-31
Data Inputs/Outputs
A0-18
Address Inputs
SWE#1-4
SRAM Write Enables
SCS#
SRAM Chip Select
OE#
Output Enable
VCC
Power Supply
GND
Ground
NC
Not Connected
FWE#1-4
Flash Write Enables
FCS
Flash Chip Select
OE#
A
0-18
FCS#
SCS#
FWE
1
#
SWE
1
#
FWE
2
#
SWE
2
#
FWE
3
#
SWE
3
#
FWE
4
#
SWE
4
#
128K x 8 Flash
128K x 8 SRAM
I/O
0-7
128K x 8 Flash
128K x 8 SRAM
I/O
8-15
128K x 8 Flash
128K x 8 SRAM
I/O
16-23
128K x 8 Flash
128K x 8 SRAM
I/O
24-31
Top View
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