
This X24012 device has been acquired by
IC MICROSYSTEMS from Xicor, Inc.
1K
1
START
STOP
LOGIC
CONTROL
LOGIC
SLAVE ADDRESS
REGISTER
+COMPARATOR
H.V. GENERATION
TIMING
& CONTROL
WORD
ADDRESS
COUNTER
XDEC
YDEC
DOUT
ACK
E
2
PROM
32 X 32
DATA REGISTER
START CYCLE
(8) V
CC
R/W
PIN
(4) V
SS
(5) SDA
(6) SCL
(3) A 2
(2) A 1
(1) A 0
D
OUT
LOAD
INC
CK
8
DESCRIPTION
The X24012 is a CMOS 1024 bit serial E
2
PROM,
internally organized as one 128 x 8 bank. The X24012
features a serial interface and software protocol allowing
operation on a simple two wire bus. Three address
inputs allow up to eight devices to share a common two wire
bus.
Xicor E
2
PROMs are designed and tested for applications
requiring extended endurance. Inherent data retention
is greater than 100 years. The X24012 is available in eight
pin DIP and SOIC packages.
FEATURES
2.7 to 5.5V Power Supply
Low Power CMOS
—Active Current Less Than 1 mA
—Standby Current Less Than 50
∝
A
Internally Organized 128 x 8
Self Timed Write Cycle
—Typical Write Cycle Time of 5 ms
2 Wire Serial Interface
—Bidirectional Data Transfer Protocol
Four Byte Page Write Operation
—Minimizes Total Write Time Per Byte
High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
Xicor, 1991 Patents Pending
Characteristics subject to change without notice
X24012
128 x 8 Bit
Serial E
2
PROM
FUNCTIONAL DIAGRAM
3847 FHD F01
3847-1
IC
mic
IC MICROSYSTEMS
TM