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參數資料
型號: X25138Z-V
英文描述: 5MHz SPI Serial E2PROM with Block Lock PROTECTION
中文描述: 5MHz的SPI串行E2PROM的區塊可鎖定的保護
文件頁數: 1/18頁
文件大?。?/td> 88K
代理商: X25138Z-V
5MHz SPI Serial E
2
PROM with Block Lock
TM
Protection
128K
16K x 8 Bit
7056–1.5 8/13/98 T2/C0/D1 EW
Xicor, Inc. 1998 Patents Pending
1
Characteristics subject to change without notice
X25138
FEATURES
5MHz Clock Rate
Low Power CMOS
<1
m
A Standby Current
<5mA Active Current
2.5V To 5.5V Power Supply
SPI Modes (0,0 & 1,1)
16K X 8 Bits
32 Byte Page Mode
Block Lock Protection
Protect 1/4, 1/2 or all of E
Programmable Hardware Write Protection
In-Circuit Programmable ROM Mode
Built-in Inadvertent Write Protection
Power-Up/Down protection circuitry
Write Enable Latch
Write Protect Pin
Self-Timed Write Cycle
5ms Write Cycle Time (Typical)
High Reliability
Endurance: 100,000 cycles
Data Retention: 100 Years
ESD protection: 2000V on all pins
Packages
8-Lead XBGA
8, 14-Lead SOIC
8-Lead PDIP
8-Lead TSSOP
2
PROM Array
DESCRIPTION
The X25138 is a CMOS 128K-bit serial E
internally organized as 16K x 8. The X25138 features
a Serial Peripheral Interface (SPI) and software
protocol allowing operation on a simple three-wire bus.
The bus signals are a clock input (SCK) plus separate
data in (SI) and data out (SO) lines. Access to the
device is controlled through a chip select (CS) input,
allowing any number of devices to share the same
bus.
2
PROM,
The X25138 also features two additional inputs that
provide the end user with added flexibility. By
asserting the HOLD input, the X25138 will ignore tran-
sitions on its inputs, thus allowing the host to service
higher priority interrupts. The WP input can be used as
a hardwire input to the X25138 disabling all write
attempts to the status register, thus providing a mech-
anism for limiting end user capability of altering 0, 1/4,
1/2 or all of the memory.
The X25138 utilizes Xicor’s proprietary Direct Write
cell, providing a minimum endurance of 100,000
cycles and a minimum data retention of 100 years.
TM
COMMAND
DECODE
AND
CONTROL
LOGIC
WRITE
CONTROL
AND
TIMING
LOGIC
WRITE
PROTECT
LOGIC
X DECODE
LOGIC
16K BYTE
ARRAY
128 X 256
Y DECODE
DATA REGISTER
SO
SI
SCK
CS
HOLD
WP
128
256
8
32
STATUS
REGISTER
128
256 X 256
128 X 256
7037 FRM F01
Direct Write
and Block Lock
Protection is a trademark of Xicor, Inc.
FUNCTIONAL DIAGRAM
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相關代理商/技術參數
參數描述
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