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參數(shù)資料
| 型號： | X25644V14I-2.7 |
| 英文描述： | Programmable Watchdog Timer w/Serial E 2 PROM |
| 中文描述： | 可編程看門狗定時器瓦特/ 2 PROM的序列位置 |
| 文件頁數(shù)： | 1/15頁 |
| 文件大?。?/td> | 76K |
| 代理商： | X25644V14I-2.7 |
7050 -1.0 6/20/97 T0/C0/D0 SH
Xicor, Inc. 1994, 1995, 1996 Patents Pending
1
Characteristics subject to change without notice
64K
32K
16K
X25644/46
X25324/26
X25164/66
8K x 8 Bit
4K x 8 Bit
2K x 8 Bit
Programmable Watchdog Timer w/Serial E
2
PROM
FEATURES
Programmable Watchdog Timer with Reset
Assertion
—Reset Signal Valid to Vcc=1V
—Power Up Reset Control
Save Critical Data With Block Lock
—Block Lock
Protect 0, 1/4, 1/2 or all of
Serial E
PROM Memory Array
In Circuit Programmable ROM Mode
Long Battery Life With Low Power Consumption
—<50
μ
A Max Standby Current, Watchdog On
—<1
μ
A Max Standby Current, Watchdog Off
—<5mA Max Active Current during Write
—<400
μ
A Max Active Current during Read
1.8V to 3.6V, 2.7V to 5.5V and 4.5V to 5.5V Power
Supply Operation
2MHz Clock Rate
Minimize Programming Time
—32 Byte Page Write Mode
—Self-Timed Write Cycle
—5ms Write Cycle Time (Typical)
SPI Modes (0,0 & 1,1)
Built-in Inadvertent Write Protection
—Power-Up/Power-Down Protection Circuitry
—Write Enable Latch
—Write Protect Pin
High Reliability
Available Packages
—14-Lead SOIC (X2564x)
—14-Lead TSSOP (X2532x, X2516x)
—8-Lead SOIC (X2532x, X2516x)
TM
Protection
TM
2
DESCRIPTION
These devices combine two popular functions, Watchdog
Timer, and Serial E
PROM Memory in one package. This
combination lowers system cost, reduces board space
requirements, and increases reliability.
2
The Watchdog Timer provides an independent protection
mechanism for microcontrollers. During a system failure,
the device will respond with a RESET/RESET signal
after a selectable time-out interval. The user selects the
interval from three preset values. Once selected, the
interval does not change, even after cycling the power.
The memory portion of the device is a CMOS Serial
E
PROM array with Xicor’s Block Lock
array is internally organized as x 8. The device features a
Serial Peripheral Interface (SPI) and software protocol
allowing operation on a simple four-wire bus.
2
TM
Protection. The
The device utilizes Xicor’s proprietary Direct Write
providing a minimum endurance of 100,000 cycles per
sector and a minimum data retention of 100 years.
TM
cell,
BLOCK DIAGRAM
DATA
REGISTER
COMMAND
DECODE &
CONTROL
LOGIC
RESET
CONTROL
WRITE,
BLOCK LOCK &
ICP ROM CONTROL
X - DECODE
LOGIC
STATUS
REGISTER
WATCHDOG
TIMER
PAGE DECODE LOGIC
SERIAL
E
PROM
ARRAY
2
HIGH
VOLTAGE
CONTROL
SI
SO
SCK
CS
RESET/RESET
WP
7029 FRM 01
32
8
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| X25645 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Programmable Watchdog Timer & V CC Supervisory Circuit w/Serial E 2 PROM |
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| X25645S14-1.8 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Programmable Watchdog Timer & V CC Supervisory Circuit w/Serial E 2 PROM |
| X25645S14-2.7 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Programmable Watchdog Timer & V CC Supervisory Circuit w/Serial E 2 PROM |
| X25645S14I | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Programmable Watchdog Timer & V CC Supervisory Circuit w/Serial E 2 PROM |
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