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參數(shù)資料
| 型號： | X40035-A |
| 廠商： | Intersil Corporation |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | Dual Voltage Monitor with Intergrated CPU Supervisor |
| 中文描述： | 雙電壓監(jiān)視器集成CPU監(jiān)控 |
| 文件頁數(shù)： | 1/21頁 |
| 文件大小： | 322K |
| 代理商： | X40035-A |
1
FN8114.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
PRELIMINARY
X40030, X40031, X40034, X40035
Triple Voltage Monitor with Integrated
CPU Supervisor
FEATURES
Triple voltage detection and reset assertion
—Standard reset threshold settings
See selection table on page 2.
—Adjust low voltage reset threshold voltages
using special programming sequence
—Reset signal valid to V
CC
= 1V
—Monitor three seperate voltages
Fault detection register
Selectable power on reset timeout
(0.05s, 0.2s, 0.4s, 0.8s)
Selectable watchdog timer interval
(25ms, 200ms, 1.4s or off)
Debounced manual reset input
Low power CMOS
—25μA typical standby current, watchdog on
—6μA typical standby current, watchdog off
400kHz 2-wire interface
2.7V to 5.5V power supply operation
Available packages
—14-lead SOIC, TSSOP
Monitor Voltages: 5V to 0.9V
Independent Core Voltage Monitor
APPLICATIONS
Communication Equipment
—Routers, Hubs, Switches
—Disk arrays, Network Storage
Industrial Systems
—Process Control
—Intelligent Instrumentation
Computer Systems
—Computers
—Network Servers
DESCRIPTION
The X40030, X40031, X40034, X40035 combines
power-on reset control, watchdog timer, supply voltage
supervision, second and third voltage supervision, and
manual reset, in one package. This combination lowers
system cost, reduces board space requirements, and
increases reliability.
Applying voltage to V
CC
activates the power on reset
circuit which holds RESET/RESET active for a period of
time. This allows the power supply and system oscilla-
tor to stabilize before the processor can execute code.
Low V
CC
detection circuitry protects the user’s system
from low voltage conditions, resetting the system
when V
CC
falls below the minimum V
TRIP1
point.
RESET/RESET is active until V
CC
returns to proper
operating level and stabilizes. A second and third volt-
age monitor circuit tracks the unregulated supply to
provide a power fail warning or monitors different
power supply voltage. Three common low voltage
combinations are available, however, Intersil’s unique
circuits allows the threshold for either voltage monitor
to be reprogrammed to meet specific system level
requirements or to fine-tune the threshold for applica-
BLOCK DIAGRAM
V3FAIL
V2FAIL
WDO
MR
LOWLINE
RESET
X40031/35
X40030/34
V3 Monitor
Logic
V2 Monitor
Logic
Fault Detection
Register
Status
Register
Data
Register
Command
Decode Test
& Control
Logic
Power on,
Manual Reset
Low Voltage
Reset
Generation
V
CC
Monitor
Logic
V3MON
V2MON
SDA
WP
SCL
V
CC
(V1MON)
Watchdog
and
Reset Logic
+
-
V
TRIP3
+
-
V
TRIP2
+
-
V
TRIP1
V
or
V2MON*
Data Sheet
April 28, 2005
相關PDF資料 |
PDF描述 |
|---|---|
| X40035-C | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40030V14-A | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40030V14-B | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40035-A&B | Dual Voltage Monitor with Intergrated CPU Supervisor |
| X40035-B&C | Dual Voltage Monitor with Intergrated CPU Supervisor |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| X40035-A&B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitor with Intergrated CPU Supervisor |
| X40035B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitor with Integrated CPU Supervisor |
| X40035-B&C | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitor with Intergrated CPU Supervisor |
| X40035C | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitor with Integrated CPU Supervisor |
| X40035-C | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitor with Intergrated CPU Supervisor |
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