
1
FN8120.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
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Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X4163, X4165
16K, 2K x 8 Bit
CPU Supervisor with 16K EEPROM
FEATURES
Selectable watchdog timer
Low VCC detection and reset assertion
—Four standard reset threshold voltages
—Adjust low VCC reset threshold voltage using
special programming sequence
—Reset signal valid to VCC = 1V
Low power CMOS
—<20A max standby current, watchdog on
—<1A standby current, watchdog OFF
—3mA active current
16Kbits of EEPROM
—64-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
Built-in inadvertent write protection
—Power-up/power-down protection circuitry
—Block Lock (1, 2, 4, 8 pages, all, none)
400kHz 2-wire interface
2.7V to 5.5V power supply operation
Available Packages
—8 Ld SOIC
—8 Ld TSSOP
Pb-free plus anneal available (RoHS compliant)
DESCRIPTION
The X4163, X4165 combines four popular functions,
Power-on Reset Control, Watchdog Timer, Supply Volt-
age Supervision, and Serial EEPROM Memory in one
package. This combination lowers system cost,
reduces board space requirements, and increases reli-
ability.
Applying power to the device activates the power on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable
time
out
interval,
the
device
activates
the
RESET/RESET signal. The user selects the interval
from three preset values. Once selected, the interval
does not change, even after cycling the power.
The device’s low VCC detection circuitry protects the
user’s system from low voltage conditions, resetting the
system when VCC falls below the set minimum VCC trip
point. RESET/RESET is asserted until VCC returns to
proper operating level and stabilizes. Four industry
standard VTRIP thresholds are available, however, Inter-
sil’s unique circuits allow the threshold to be repro-
grammed to meet custom requirements or to fine-tune
the threshold for applications requiring higher precision.
BLOCK DIAGRAM
Watchdog
Timer Reset
Data
Register
Command
Decode &
Control
Logic
SDA
SCL
VCC
Reset &
Watchdog
Timebase
Power on and
Generation
VTRIP
+
-
RESET (X4163)
Reset
Low Voltage
Status
Register
Protect Logic
EEPROM Array
Watchdog Transition
Detector
WP
VCC Threshold
Reset logic
Block
Lock
C
ontrol
2Kb
RESET (X4165)
S0
S1
Data Sheet
November 26, 2007
NOT
RECO
MME
NDED
FOR
NEW
DESI
GNS
POSS
IBLE
SUBS
TITUT
E PR
ODU
CT
ISL88
013