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參數(shù)資料
| 型號： | X4283AM |
| 元件分類： | EEPROM |
| 英文描述： | CPU Supervisor with 128K EEPROM |
| 中文描述： | CPU監(jiān)控與128K的EEPROM的 |
| 文件頁數(shù)： | 1/22頁 |
| 文件大小： | 412K |
| 代理商： | X4283AM |
REV 1.17 11/27/00
Characteristics subject to change without notice.
1 of 22
www.xicor.com
Preliminary Information
128K
X4283/85
16K x 8 Bit
CPU Supervisor with 128K EEPROM
FEATURES
Selectable watchdog timer
Low V
CC
detection and reset assertion
—Four standard reset threshold voltages
—Adjust low V
CC
reset threshold voltage using
special programming sequence
—Reset signal valid to V
Low power CMOS
—<20μA max standby current, watchdog on
—<1μA standby current, watchdog OFF
—3mA active current
128Kbits of EEPROM
—64 byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
Built-in inadvertent write protection
—Power-up/power-down protection circuitry
—Protect 0, 1/4, 1/2, all or 64, 128, 256 or 512
bytes of EEPROM array with programmable
Block Lock
protection
400kHz 2-wire interface
2.7V to 5.5V power supply operation
Available packages
—8-lead SOIC
—8-lead TSSOP
CC
= 1V
DESCRIPTION
The X4283/85 combines four popular functions,
Power-on Reset Control, Watchdog Timer, Supply Volt-
age Supervision, and Block Lock protect serial
EEPROM memory in one package. This combination
lowers system cost, reduces board space require-
ments, and increases reliability.
Applying power to the device activates the power on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable
time out interval, the device activates the RESET/
RESET signal. The user selects the interval from three
preset values. Once selected, the interval does not
change, even after cycling the power.
The device’s low V
user’s system from low voltage conditions, resetting
the system when V
CC
falls below the set minimum V
trip point. RESET/RESET is asserted until V
to proper operating level and stabilizes. Four industry
CC
detection circuitry protects the
CC
CC
returns
BLOCK DIAGRAM
Watchdog
Timer Reset
Data
Register
Command
Decode &
Control
Logic
SDA
SCL
V
CC
Reset &
Watchdog
Timebase
Power on and
Low Voltage
Generation
V
TRIP
+
-
RESET (X4283)
RESET (X4285)
Reset
Status
Register
EEPROM Array
Protect Logic
Watchdog Transition
Detector
WP
V
CC
Threshold
Reset logic
B
8
S0
S1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X4285AN | CPU Supervisor with 128K EEPROM |
| X4285AP | CPU Supervisor with 128K EEPROM |
| X4285F | CPU Supervisor with 128K EEPROM |
| X4285G | CPU Supervisor with 128K EEPROM |
| X4285I | CPU Supervisor with 128K EEPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X4283AN | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 128K EEPROM |
| X4283AP | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 128K EEPROM |
| X4283F | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 128K EEPROM |
| X4283G | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 128K EEPROM |
| X4283I | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:CPU Supervisor with 128K EEPROM |
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