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參數(shù)資料
| 型號(hào)： | X5648S14-2.7 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | RTC Module With CPU Supervisor |
| 中文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO14 |
| 封裝： | PLASTIC, SOIC-14 |
| 文件頁(yè)數(shù)： | 1/18頁(yè) |
| 文件大小： | 300K |
| 代理商： | X5648S14-2.7 |
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1
FN8136.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X5648, X5649
(Replaces X25648, X25649)
CPU Supervisor with 64Kbit SPI EEPROM
FEATURES
Low V
CC
detection and reset assertion
—Five standard reset threshold voltages
—Re-program low V
CC
reset threshold voltage
using special programming sequence
—Reset signal valid to V
CC
= 1V
Long battery life with low power consumption
—<50μA max standby current, watchdog on
—<1μA max standby current, watchdog off
—<400μA max active current during read
64Kbits of EEPROM
Built-in inadvertent write protection
—Power-up/power-down protection circuitry
—Protect 0, 1/4, 1/2 or all of EEPROM array with
Block Lock
protection
—In circuit programmable ROM mode
2MHz SPI interface modes (0,0 & 1,1)
Minimize EEPROM programming time
—32-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
2.7V to 5.5V and 4.5V to 5.5V power supply
operation
Available packages
—14-lead SOIC, 8-lead PDIP
DESCRIPTION
These devices combine three popular functions, Power-
on Reset Control, Supply Voltage Supervision, and Block
Lock Protect Serial EEPROM Memory in one package.
This combination lowers system cost, reduces board
space requirements, and increases reliability.
Applying power to the device activates the power-on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The device’s low V
CC
detection circuitry protects the
user’s system from low voltage conditions by holding
RESET/RESET active when V
CC
falls below a minimum
V
CC
trip point. RESET/RESET remains asserted until
V
CC
returns to proper operating level and stabilizes. Five
industry standard V
TRIP
thresholds are available,
however, Intersil’s unique circuits allow the threshold to
be reprogrammed to meet custom requirements or to
fine-tune the threshold in applications requiring higher
precision.
BLOCK DIAGRAM
Data
Register
Command
Decode &
Control
Logic
SI
SO
SCK
CS
V
CC
Reset
Timebase
Power-on and
Low Voltage
Generation
V
TRIP
+
-
RESET/RESET
Reset
Status
Register
Protect Logic
16Kbits
16Kbits
32Kbits
E
WP
X5648 = RESET
X5649 = RESET
Data Sheet
March 17, 2005
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| X5648S14-4.5A | 功能描述:IC SUPERVISOR CPU 64K EE 14-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:簡(jiǎn)單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:推挽式，圖騰柱 復(fù)位:低有效 復(fù)位超時(shí):最小 145 ms 電壓 - 閥值:2.64V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-WQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:16-TQFN-EP（4x4） 包裝:帶卷 (TR) |
| X5648S14I | 功能描述:IC SUPERVISOR CPU 64K EE 14-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:簡(jiǎn)單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:推挽式，圖騰柱 復(fù)位:低有效 復(fù)位超時(shí):最小 145 ms 電壓 - 閥值:2.64V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-WQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:16-TQFN-EP（4x4） 包裝:帶卷 (TR) |
| X5648S14I-2.7 | 功能描述:IC SUPERVISOR CPU 64K EE 14-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:簡(jiǎn)單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:推挽式，圖騰柱 復(fù)位:低有效 復(fù)位超時(shí):最小 145 ms 電壓 - 閥值:2.64V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-WQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:16-TQFN-EP（4x4） 包裝:帶卷 (TR) |
| X5648S14I-2.7A | 功能描述:IC SUPERVISOR CPU 64K EE 14-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:簡(jiǎn)單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:推挽式，圖騰柱 復(fù)位:低有效 復(fù)位超時(shí):最小 145 ms 電壓 - 閥值:2.64V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-WQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:16-TQFN-EP（4x4） 包裝:帶卷 (TR) |
| X5648S14I-2.7T1 | 功能描述:IC SUPERVISOR CPU 64K EE 14-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:簡(jiǎn)單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:推挽式，圖騰柱 復(fù)位:低有效 復(fù)位超時(shí):最小 145 ms 電壓 - 閥值:2.64V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-WQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:16-TQFN-EP（4x4） 包裝:帶卷 (TR) |
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