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參數資料
| 型號： | X84161P-2.5 |
| 元件分類： | EEPROM |
| 英文描述： | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 中文描述： | 該CAT24FC02是一個2 KB的EEPROM的國內256個8位每字舉辦的串行CMOS |
| 文件頁數： | 1/18頁 |
| 文件大小： | 170K |
| 代理商： | X84161P-2.5 |
7008-1.2 8/26/97 T2/C0/D0 SH
Xicor, Inc. 1994, 1997Patents Pending
1
Characteristics subject to change without notice
A
PPLICATION
N
OTE
A V A I L A B L E
AN95 AN103 AN107
16K/64K/128K
MPS
EEPROM
μ
Port Saver EEPROM
FEATURES
Up to 10MHz data transfer rate
25ns Read Access Time
Direct Interface to Microprocessors and
Microcontrollers
—Eliminates I/O port requirements
—No interface glue logic required
—Eliminates need for parallel to serial converters
Low Power CMOS
—1.8V–3.6V, 2.5V–5.5V and 5V
—Standby Current Less than 1
—Active Current Less than 1mA
Byte or Page Write Capable
—32-Byte Page Write Mode
Typical Nonvolatile Write Cycle Time: 2ms
High Reliability
—100,000 Endurance Cycles
—Guaranteed Data Retention: 100 Years
±
μ
10% Versions
A
DESCRIPTION
The
cial hardware and connect to the processor memory bus.
Replacing bytewide data memory, the
bytewide memory control functions, takes a fraction of
the board space and consumes much less power.
Replacing serial memories, the
the serial benefits, such as low cost, low power, low volt-
age, and small package size while releasing I/Os for
more important uses.
μ
Port Saver memories need no serial ports or spe-
μ
Port Saver uses
μ
Port Saver provides all
The
active read signal. This is less than the read access time
of most hosts and provides “no-wait-state” operation.
This prevents bottlenecks on the bus. With rates to 10
MHz, the
μ
Port Saver supplies data faster than required
by most host read cycle specifications. This eliminates
the need for software NOPs.
μ
Port Saver memory outputs data within 25ns of an
The
the data bus using a sequence of standard bus read and
write operations. This “bit serial” interface allows the
μ
Port Saver to work well in 8-bit, 16 bit, 32-bit, and 64-bit
systems.
μ
Port Saver memories communicate over one line of
A Write Protect (WP) pin prevents inadvertent writes to
the memory.
Xicor EEPROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data reten-
tion is greater than 100 years.
BLOCK DIAGRAM
CE
I/O
H.V. GENERATION
TIMING & CONTROL
EEPROM
ARRAY
COMMAND
DECODE
AND
CONTROL
LOGIC
X
DEC
Y DECODE
DATA REGISTER
WP
7008 FRM F02.1
OE
WE
16K x 8
8K x 8
2K x 8
P0/CS
P1/CLK
P2/DI
P3/DO
System Connection
Internal Block Diagram
MPS
μ
P
μ
C
DSP
ASIC
RISC
Ports
Saved
A15
A0
D7
D0
OE
WE
X84161/641/129
相關PDF資料 |
PDF描述 |
|---|---|
| X84641P-2.5 | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| X86C64 | E2 Micro-Peripheral |
| X86C64P | E2 Micro-Peripheral |
| X86C64PI | E2 Micro-Peripheral |
| X86C64PM | E2 Micro-Peripheral |
相關代理商/技術參數 |
參數描述 |
|---|---|
| X84161PI | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:uPort Saver EEPROM |
| X84161PI-1.8 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:uPort Saver EEPROM |
| X84161PI-2.5 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:uPort Saver EEPROM |
| X84161PM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Serial EEPROM |
| X84161PM-1.8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Serial EEPROM |
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