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參數(shù)資料
型號: X93256UV14I-2.7
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計
英文描述: Dual Digitally Controlled Potentiometers
中文描述: DUAL 50K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 32 POSITIONS, PDSO14
封裝: 4.40 MM, PLASTIC, MO-153AC, TSSOP-14
文件頁數(shù): 1/9頁
文件大小: 211K
代理商: X93256UV14I-2.7
1
FN8188.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832
Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X93256
Dual Digitally Controlled Potentiometers
(XDCPs)
FEATURES
Dual solid-state potentiometers
Individual Up/Down interfaces
32 wiper tap points per potentiometer
—Wiper position stored in nonvolatile memory
and recalled on power-up
31 resistive elements per potentiometer
—Temperature compensated
—Maximum resistance tolerance of ± 25%
—Terminal voltage, 0 to V
CC
Low power CMOS
—V
CC
= 2.7 V - 5.5 V.
—Active current, 200μA typical per potentiometer
—Standby current, 4μA max per potentiometer
High reliability
—Endurance 200,000 data changes per bit
—Register data retention, 100 years
R
TOTAL
value = 12.5k
, 50k
Packages
—14-lead TSSOP
DESCRIPTION
The Intersil X93256 is a dual digitally controlled
potentiometer (XDCP). The device consists of two
resistor arrays, wiper switches, a control section, and
nonvolatile memory. The wiper positions are controlled
by individual Up/Down interfaces.
A potentiometer is implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. The position of each wiper element is controlled
by a set of independent CS, U/D, and INC inputs. The
position of the wiper can be stored in nonvolatile memory
and then be recalled upon a subsequent power-up
operation.
Each potentiometer is connected as a three-terminal
variable resistor and can be used in a wide variety of
applications including:
– bias and gain control
– LCD Contrast Adjustment
BLOCK DIAGRAM
5-Bit
Up/Down
Counter
5-Bit
Nonvolatile
Memory
Store and
Control
Recall
Circuitry
One
of
Thirty
Two
Decoder
Resistor
Array
R
H1
U/D
1
INC
1
CS
1
Transfer
Gates
V
CC
V
SS
R
L1
General Description
Detailed Single Potentiometer Description
0
1
2
28
29
30
31
Control
and
Memory
Up/Down
(U/D
1
& U/D
2
)
Increment
(INC
1
& INC
2
)
Device Select
(CS
1
& CS
2
)
V
CC
(Supply Voltage)
V
SS
(Ground)
R
H1
R
L1
30K
R
H2
R
L2
R
W
R
W1
R
W2
Data Sheet
March 4, 2005
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