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參數(shù)資料
| 型號(hào)： | XC2V3000-5BF957C |
| 廠商： | XILINX INC |
| 元件分類： | FPGA |
| 英文描述： | Virtex-II 1.5V Field-Programmable Gate Arrays |
| 中文描述： | FPGA, 3584 CLBS, 3000000 GATES, 750 MHz, PBGA957 |
| 封裝： | 40 X 40 MM, 1.27 MM PITCH, MS-034BAU-1, FLIP CHIP, BGA-957 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大小： | 127K |
| 代理商： | XC2V3000-5BF957C |
Advance Product Specification
www.xilinx.com
1-800-255-7778
Module 1 of 4
1
Summary of Virtex
-II Features
Industry First Platform FPGA Solution
IP-Immersion Architecture
-
Densities from 40K to 8M system gates
-
420 MHz internal clock speed (Advance Data)
-
840+ Mb/s I/O (Advance Data)
SelectRAM Memory Hierarchy
-
3 Mb of True Dual-Port RAM in 18-Kbit block
SelectRAM resources
-
Up to 1.5 Mb of distributed SelectRAM
resources
-
High-performance interfaces to external memory
·
DDR-SDRAM interface
·
FCRAM interface
·
QDR
-SRAM interface
·
Sigma RAM interface
Arithmetic Functions
-
Dedicated 18-bit x 18-bit multiplier blocks
-
Fast look-ahead carry logic chains
Flexible Logic Resources
-
Up to 93,184 internal registers / latches with Clock
Enable
-
Up to 93,184 look-up tables (LUTs) or cascadable
16-bit shift registers
-
Wide multiplexers and wide-input function support
-
Horizontal cascade chain and Sum-of-Products
support
-
Internal 3-state bussing
High-Performance Clock Management Circuitry
-
Up to 12 DCM (Digital Clock Manager) modules
·
Precise clock de-skew
·
Flexible frequency synthesis
·
High-resolution phase shifting
-
16 global clock multiplexer buffers
Active Interconnect
Technology
-
Fourth generation segmented routing structure
-
Predictable, fast routing delay, independent of
fanout
SelectI/O-Ultra
Technology
-
Up to 1,108 user I/Os
-
19 single-ended standards and six differential
standards
-
Programmable sink current (2 mA to 24 mA) per I/O
-
Digitally Controlled Impedance (DCI) I/O: on-chip
termination resistors for single-ended I/O standards
PCI-X @ 133 MHz, PCI @ 66 MHz and 33 MHz
compliance, and CardBus compliant
Differential Signaling
·
840 Mb/s Low-Voltage Differential Signaling I/O
(LVDS) with current mode drivers
·
Bus LVDS I/O
·
Lightning Data Transport (LDT) I/O with current
driver buffers
·
Low-Voltage Positive Emitter-Coupled Logic
(LVPECL) I/O
·
Built-in DDR Input and Output registers
Proprietary high-performance SelectLink
Technology
·
High-bandwidth data path
·
Double Data Rate (DDR) link
·
Web-based HDL generation methodology
Supported by Xilinx Foundation
and Alliance
Series Development Systems
-
Integrated VHDL and Verilog design flows
-
Compilation of 10M system gates designs
-
Internet Team Design (ITD) tool
SRAM-Based In-System Configuration
-
Fast SelectMAP
configuration
-
Triple Data Encryption Standard (DES) security
option (Bitstream Encryption)
-
IEEE1532 support
-
Partial reconfiguration
-
Unlimited re-programmability
-
Readback capability
0.15 μm 8-Layer Metal process with 0.12 μm
high-speed transistors
1.5 V (V
CCINT
) core power supply, dedicated 3.3 V
V
CCAUX
auxiliary and V
CCO
I/O power supplies
IEEE 1149.1 compatible boundary-scan logic support
Flip-Chip and Wire-Bond Ball Grid Array (BGA)
packages in three standard fine pitches (0.80mm,
1.00mm, and 1.27mm)
100% factory tested
-
-
-
0
Virtex-II 1.5V
Field-Programmable Gate Arrays
DS031-1 (v1.7) October 2, 2001
0
0
Advance Product Specification
R
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XC2V3000-5BG728I | Virtex-II 1.5V Field-Programmable Gate Arrays |
| XC2V3000-5FG676C | Virtex-II 1.5V Field-Programmable Gate Arrays |
| XC2V3000-5FG676I | Virtex-II 1.5V Field-Programmable Gate Arrays |
| XC2V3000-6BF957C | Virtex-II 1.5V Field-Programmable Gate Arrays |
| XC2V3000-6BF957I | Virtex-II 1.5V Field-Programmable Gate Arrays |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XC2V3000-5BF957C0921 | 制造商:Xilinx 功能描述: |
| XC2V3000-5BF957CES | 制造商:Xilinx 功能描述: |
| XC2V3000-5BF957C-ES | 制造商:Xilinx 功能描述:Field-Programmable Gate Array, 3584 Cell, 957 Pin, Plastic, BGA |
| XC2V3000-5BF957I | 功能描述:IC FPGA VIRTEX-II 957FCBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:Virtex®-II 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55） |
| XC2V3000-5BFG957C | 制造商:Xilinx 功能描述:FPGA VIRTEX-II 3M GATES 32256 CELLS 750MHZ 0.15UM/0.12UM 1.5 - Trays |
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