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| 型號(hào)： | XC4013XL-3PQ160M |
| 廠商： | Xilinx, Inc. |
| 英文描述： | XC4000E and XC4000X Series Field Programmable Gate Arrays |
| 中文描述： | XC4000E和XC4000X系列現(xiàn)場(chǎng)可編程門(mén)陣列 |
| 文件頁(yè)數(shù)： | 1/4頁(yè) |
| 文件大小： | 21K |
| 代理商： | XC4013XL-3PQ160M |
1
XC4000E
Logic Cell Array Family
Product Preview
Device
XC4003E
XC4005E
XC4006E
XC4008E
XC4010E
XC4013E
XC4020E XC4025E
Appr. Gate Count
3,000
5,000
6,000
8,000
10,000
13,000
20,000
25,000
CLB Matrix
10 x 10
14 x 14
16 x 16
18 x 18
20 x 20
24 x 24
28 x 28
32 x 32
Number of CLBs
100
196
256
324
400
576
784
1,024
Number of Flip-Flops
360
616
768
936
1,120
1,536
2,016
2,560
Max Decode Inputs (per side)
30
42
48
54
60
72
84
96
Max RAM Bits
3,200
6,272
8,192
10,368
12,800
18,432
25,088
32,768
Number of IOBs
80
112
128
144
160
192
224
256
Table 1. The XC4000E Family of Field-Programmable Gate Arrays
Description
The XC4000E family of Field-Programmable Gate Arrays
(FPGAs) provides the benefits of custom CMOS VLSI,
while avoiding the initial cost, time delay, and inherent risk
of a conventional masked gate array.
The XC4000E family provides a regular, flexible, pro-
grammable architecture of Configurable Logic Blocks
(CLBs), interconnected by a powerful hierarchy of versa-
tile routing resources, and surrounded by a perimeter of
programmable Input/Output Blocks (IOBs).
XC4000E devices have generous routing resources to
accommodate the most complex interconnect patterns.
They are customized by loading configuration data into
the internal memory cells. The FPGA can either actively
read its configuration data out of external serial or byte-
parallel PROM (master modes), or the configuration data
can be written into the FPGA (slave and peripheral
modes).
The XC4000E family is supported by powerful and sophis-
ticated software, covering every aspect of design: from
schematic entry, to simulation, to automatic block place-
ment and routing of interconnects, and finally the creation
of the configuration bit stream.
FPGAs are ideal for shortening the design and develop-
ment cycle, but they also offer a cost-effective solution for
production rates well beyond 1,000 systems per month.
The XC4000E family is a superset of the popular XC4000
family. For a detailed description of the device architec-
ture, configuration methods, pin functionality, package
pin-outs and dimensions, see the Xilinx Programmable
Logic Data Book.
The following pages describes the new features of the
XC4000E family and list electrical and timing parameters.
Features
Third Generation Field-Programmable Gate Arrays
– On-chip ultra-fast RAM with synchronous write option
– Dual-port RAM option
– Fully PCI compliant
– Abundant flip-flops
– Flexible function generators
– Dedicated high-speed carry-propagation circuit
– Wide edge decoders (four per edge)
– Hierarchy of interconnect lines
– Internal 3-state bus capability
– 8 global low-skew clock or signal distribution network
Flexible Array Architecture
– Programmable logic blocks and I/O blocks
– Programmable interconnects and wide decoders
Sub-micron CMOS Process
– High-speed logic and Interconnect
– Low power consumption
Systems-Oriented Features
– IEEE 1149.1-compatible boundary-scan logic support
– Programmable output slew rate (2 modes)
– Programmable input pull-up or pull-down resistors
– 12-mA sink current per output
– 24-mA sink current per output pair
Configured by Loading Binary File
– Unlimited reprogrammability
– Six programming modes
XACT Development System runs on ’386/’486/
Pentium-type PC, Apollo, Sun-4, and Hewlett-Packard
700 series
– Interfaces to popular design environments like
Viewlogic, Mentor Graphics and OrCAD
– Fully automatic partitioning, placement and routing
– Interactive design editor for design optimization
– 288 macros, 34 hard macros, RAM/ROM compiler
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| XC4013XL-3PQ208C | 功能描述:IC FPGA C-TEMP 3.3V 3SPD 208PQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:XC4000E/X 標(biāo)準(zhǔn)包裝:1 系列:Kintex-7 LAB/CLB數(shù):25475 邏輯元件/單元數(shù):326080 RAM 位總計(jì):16404480 輸入/輸出數(shù):350 門(mén)數(shù):- 電源電壓:0.97 V ~ 1.03 V 安裝類(lèi)型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:900-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:900-FCBGA（31x31） 其它名稱(chēng):122-1789 |
| XC4013XL-3PQ208I | 功能描述:IC FPGA I-TEMP 3.3V 3SPD 208PQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:XC4000E/X 標(biāo)準(zhǔn)包裝:1 系列:Kintex-7 LAB/CLB數(shù):25475 邏輯元件/單元數(shù):326080 RAM 位總計(jì):16404480 輸入/輸出數(shù):350 門(mén)數(shù):- 電源電壓:0.97 V ~ 1.03 V 安裝類(lèi)型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:900-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:900-FCBGA（31x31） 其它名稱(chēng):122-1789 |
| XC4013XL-3PQ208M | 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:XC4000E and XC4000X Series Field Programmable Gate Arrays |
| XC4013XL-3PQ240C | 功能描述:IC FPGA C-TEMP 3.3V 3SPD 240PQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:XC4000E/X 標(biāo)準(zhǔn)包裝:1 系列:Kintex-7 LAB/CLB數(shù):25475 邏輯元件/單元數(shù):326080 RAM 位總計(jì):16404480 輸入/輸出數(shù):350 門(mén)數(shù):- 電源電壓:0.97 V ~ 1.03 V 安裝類(lèi)型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:900-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:900-FCBGA（31x31） 其它名稱(chēng):122-1789 |
| XC4013XL-3PQ240C0280 | 制造商:Xilinx 功能描述: |
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