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參數(shù)資料
型號(hào): XC4036XLA-09HQ240C
廠商: Xilinx Inc
文件頁(yè)數(shù): 1/14頁(yè)
文件大小: 0K
描述: IC FPGA C 2.5V 288 I/O 240HQFP
產(chǎn)品變化通告: XC1700 PROMs,XC5200,HQ,SCD Parts Discontinuation 19/Jul/2010
標(biāo)準(zhǔn)包裝: 24
系列: XC4000XLA/XV
LAB/CLB數(shù): 1296
邏輯元件/單元數(shù): 3078
RAM 位總計(jì): 41472
輸入/輸出數(shù): 193
門(mén)數(shù): 36000
電源電壓: 3 V ~ 3.6 V
安裝類(lèi)型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 240-BFQFP 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 240-PQFP(32x32)
其它名稱(chēng): 155001A
Q1155001A
XC4036XLA09HQ240C
DS015 (v2.0) March 1, 2013 - Product Specification
6-157
6
Product Obsolete/Under Obsolescence
XC4000XLA/XV Family Features
Note: XC4000XLA devices are improved versions of
XC4000XL devices. The XC4000XV devices have the
same features as XLA devices, incorporate additional inter-
connect resources and extend gate capacity to 500,000
system gates. The XC4000XV devices require a separate
2.5V power supply for internal logic but maintain 5V I/O
compatibility via a separate 3.3V I/O power supply. For
additional information about the XC4000XLA/XV device
architecture, refer to the XC4000E/X FPGA Series general
and functional descriptions.
System-featured Field-Programmable Gate Arrays
-Select-RAMTM memory: on-chip ultra-fast RAM with
-
Synchronous write option
-
Dual-port RAM option
-
Flexible function generators and abundant flip-flops
-
Dedicated high-speed carry logic
-
Internal 3-state bus capability
-
Eight global low-skew clock or signal distribution
networks
Flexible Array Architecture
Low-power Segmented Routing Architecture
Systems-oriented Features
-
IEEE 1149.1-compatible boundary scan
-
Individually programmable output slew rate
-
Programmable input pull-up or pull-down resistors
-
Unlimited reprogrammability
Read Back Capability
-
Program verification and internal node observability
Electrical Features
XLA Devices Require 3.0 - 3.6 V (VCC)
XV Devices Require 2.3- 2.7 V (VCCINT)
and 3.0 - 3.6 V (VCCIO)
5.0 V TTL compatible I/O
3.3 V LVTTL, LVCMOS compliant I/O
5.0 V and 3.0 V PCI Compliant I/O
12 mA or 24 mA Current Sink Capability
Safe under All Power-up Sequences
XLA Consumes 40% Less Power than XL
XV Consumes 65% Less Power than XL
Optional Input Clamping to VCC (XLA) or VCCIO (XV)
Additional Features
Footprint Compatible with XC4000XL FPGAs - Lower
cost with improved performance and lower power
Advanced Technology — 5 layer metal, 0.25
μm CMOS
process (XV) or 0.35
μm CMOS process (XLA)
Highest Performance — System performance beyond
100 MHz
High Capacity — Up to 500,000 system gates and
270,000 synchronous SRAM bits
Low Power — 3.3 V/2.5 V technology plus segmented
routing architecture
Safe and Easy to Use — Interfaces to any combination
of 3.3 V and 5.0 V TTL compatible devices
0
XC4000XLA/XV Field Programmable
Gate Arrays
DS015 (v2.0) March 1, 2013
0
0*
Product Specification
R
*
Table 1: XC4000XLA Series Field Programmable Gate Arrays
Device
Logic
Cells
Max Logic
Gates
(No RAM)
Max. RAM
Bits
(No Logic)
Typical
Gate Range
(Logic and RAM)*
CLB
Matrix
Total
CLBs
Number
of
Flip-Flops
Max.
User I/O
Required
Configur-
ation Bits
XC4013XLA
1,368
13,000
18,432
10,000 - 30,000
24 x 24
576
1,536
192
393,632
XC4020XLA
1,862
20,000
25,088
13,000 - 40,000
28 x 28
784
2,016
224
521,880
XC4028XLA
2,432
28,000
32,768
18,000 - 50,000
32 x 32
1,024
2,560
256
668,184
XC4036XLA
3,078
36,000
41,472
22,000 - 65,000
36 x 36
1,296
3,168
288
832,528
XC4044XLA
3,800
44,000
51,200
27,000 - 80,000
40 x 40
1,600
3,840
320
1,014,928
XC4052XLA
4,598
52,000
61,952
33,000 - 100,000
44 x 44
1,936
4,576
352
1,215,368
XC4062XLA
5,472
62,000
73,728
40,000 - 130,000
48 x 48
2,304
5,376
384
1,433,864
XC4085XLA
7,448
85,000
100,352
55,000 - 180,000
56 x 56
3,136
7,168
448
1,924,992
XC40110XV
9,728
110,000
131,072
75,000 - 235,000
64 x 64
4,096
9,216
448
2,686,136
XC40150XV
12,312
150,000
165,888
100,000 - 300,000
72 x 72
5,184
11,520
448
3,373,448
XC40200XV
16,758
200,000
225,792
130,000 - 400,000
84 x 84
7,056
15,456
448
4,551,056
XC40250XV
20,102
250,000
270,848
180,000 - 500,000
92 x 92
8,464
18,400
448
5,433,888
* Maximum values of gate range assume 20-30% of CLBs used as RAM
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