
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
XR16V2751
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO AND POWERSAVE
SEPTEMBER 2007
REV. 1.0.1
GENERAL DESCRIPTION
The XR16V27511 (V2751) is a high performance dual
universal asynchronous receiver and transmitter
(UART) with 64 byte TX and RX FIFOs. The device
operates from 2.25 to 3.6 volts with 5 Volt tolerant
inputs and is pin-to-pin and software compatible to
Exar’s XR16L2751. The device includes 2 additional
capabilities over the XR16V2750: Intel and Motorola
data bus selection and a “PowerSave” mode to
further reduce sleep current to a minimum during
sleep mode. It supports the Exar’s enhanced features
of programmable FIFO trigger level and FIFO level
counters,
automatic
hardware
(RTS/CTS)
and
software flow control, automatic RS-485 half duplex
direction control output and a complete modem
interface. An internal loopback capability allows
system
diagnostics.
Independent
programmable
fractional baud rate generators are provided in each
channel to select data rates up to 8 Mbps at 3.3 Volt
and 8X sampling clock. The V2751 is available in a
48-pin TQFP package.
NOTE: 1 Covered by U.S. Patent #5,649,122 and #5,949,787
APPLICATIONS
Portable Appliances
Telecommunication Network Routers
Ethernet Network Routers
Cellular Data Devices
Factory Automation and Process Controls
FEATURES
2.25 to 3.6 Volt Operation
5 Volt Tolerant Inputs
Pin-to-pin compatible to Exar’s XR16L2751 in the
48-TQFP package
Two independent UART channels
■ Register set identical to 16L2751
■ Data rate of up to 8 Mbps at 3.3 V, and
6.25 Mbps at 2.5 V with 8X sampling rate
■ Fractional Baud Rate Generator
■ Transmit and Receive FIFOs of 64 bytes
■ Programmable TX and RX FIFO Trigger Levels
■ Transmit and Receive FIFO Level Counters
■ Automatic Hardware (RTS/CTS) Flow Control
■ Selectable Auto RTS Flow Control Hysteresis
■ Automatic Software (Xon/Xoff) Flow Control
■ Automatic
RS-485
Half-duplex
Direction
Control Output via RTS#
■ Wireless Infrared (IrDA 1.0) Encoder/Decoder
■ Automatic sleep mode with wake-up interrupt
■ Full modem interface
PowerSave Feature reduces sleep current to 15
A
Device Identification and Revision
Crystal oscillator (up to 24MHz) or external clock
(up to 64MHz) input
48-TQFP package
FIGURE 1. XR16V2751 BLOCK DIAGRAM
XTAL1
XTAL2
Crystal Osc/Buffer
TXA, RXA, DTRA#,
DSRA#, RTSA#,
DTSA#, CDA#, RIA#,
OP2A#
Intel or
Motorola
Data Bus
Interface
UART Channel A
64 Byte TX FIFO
64 Byte RX FIFO
BRG
IR
ENDEC
TX & RX
UART
Regs
2.25 to 3.6V VCC
GND
*5 Volt Tolerant Inputs
(Except XTAL1)
TXB, RXB, DTRB#,
DSRB#, RTSB#,
CTSB#, CDB#, RIB#,
OP2B#
UART Channel B
(same as Channel A)
A2:A0
D7:D0
CSA# (CS#)
16/68#
CSB# (A3)
INTA (IRQ#)
INTB (logic 0)
PwrSave
IOW# (R/W#)
IOR# (VCC)
Reset (Reset#)
CLKSEL
HDCNTL#
TXRDYA#
TXRDYB#
RXRDYA#
RXRDYB#