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參數資料
型號: XRP7740ILB-0X18-F
廠商: Exar Corporation
文件頁數: 19/28頁
文件大?。?/td> 1610K
描述: IC REG 5OUT BCK/LINEAR 40TQFN
標準包裝: 98
系列: PowerXR
拓撲: 降壓(降壓)同步(4),線性(LDO)(1)
功能: 任何功能
輸出數: 5
頻率 - 開關: 1.5MHz
電壓/電流 - 輸出 1: 控制器
電壓/電流 - 輸出 2: 控制器
電壓/電流 - 輸出 3: 控制器
帶 LED 驅動器:
帶監控器:
帶序列發生器:
電源電壓: 6.5 V ~ 20 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應商設備封裝: 40-TQFN(6x6)
包裝: 托盤
其它名稱: 1016-1697
X
X
R
R
P
P
7
7
7
7
0
0
8
8
 
 
a
a
n
n
d
d
 
 
X
X
R
R
P
P
7
7
7
7
4
4
0
0
 
 
Q
Q
u
u
a
a
d
d
 
 
C
C
h
h
a
a
n
n
n
n
e
e
l
l
 
 
D
D
i
i
g
g
i
i
t
t
a
a
l
l
 
 
P
P
W
W
M
M
 
 
S
S
t
t
e
e
p
p
 
 
D
D
o
o
w
w
n
n
 
 
C
C
o
o
n
n
t
t
r
r
o
o
l
l
l
l
e
e
r
r
s
s
 
 
 
?2012 Exar Corporation
19/28
Rev. 1.2.2
POWER GOOD FLAG
The XRP7708 allows the user to set the upper and lower bound for a power good signal per
channel.     The     SET_PWRG_TARG_MAX_CHx     register     sets     the     upper     bound,     the
SET_PWRG_TARG_MIN_CHx register sets the lower bound. Each register has a 20mV LSB
resolution. When the output voltage is within bounds the power good signal is asserted high.
Typically the upper bound should be lower than the over-voltage threshold. In addition, the power
good signal can be delayed by a programmable amount set in the SET_PWRGD_DLY_CHx register.
The power good delay is only set after the soft-start period is finished. If the channel has a pre-
charged condition that falls into the power good region, a power good flag is not set until the soft-
start is finished.
PWM SWITCHING FREQUENCY
The PWM switching frequency is set by choosing the corresponding oscillator frequency and clock
divider ratio in the SET_SW_FREQUENCY register. Bits [6:4] set the oscillator frequency and bits
[2:0] set the clock divider. The tables below summarize the available Main Oscillator and PWM
switching frequency settings in the XRP7708.
Main Oscillator Frequency
SET_SW_FREQUENCY[6:4]
000
001
010
011
100
101
110
111
4  MHz    44.  MHz   41.  MHz
.4MHz
.2MHz
2MHz    2  .  Mhz
2  .  MHz
Ts
20.8ns     22.3ns
24ns
26ns
28.4ns    31.25ns    34.7ns
39ns
PWM Switching Frequency
 
SET_SW_FREQUENCY[6:4]
SET_SW_FREQUENCY[2:0]
000
001
010
011
100
101
110
111
NA
NA
NA
NA
NA
NA
NA
NA
1.  MHz    1.4MHz    1.  MHz    1.2MHz    1.1MHz    1.  MHz
KHz
800KHz
1.  MHz
KHz
7KHz
KHz    7   KHz
7KHz
KHz
KHz
011
750KHz    700KHz    650KHz    600KHz    550KHz    500KHz    450KHz    400KHz
1
600KHZ    560KHz    520KHz    480KHz    440KHz    400KHz    360KHz    320KHz
1  1
500KHz    467KHZ    433KHz    400KHz    367KHz    333KHz    300KHz
NA
42  KHZ    4   KHZ
7  KHz
4  KHz
14KHz
NA
NA
NA
111
375KHz    350KHz    325KHz    300KHz
NA
NA
NA
NA
There are a number of options that could result in similar PWM switching frequency as shown
above.   In   general,   the   chip   consumes   less   power   at   lower   oscillator   frequency.   When
synchronization to external clock is needed, the user can choose the oscillator frequency to be
within +/- 5% of the external clock frequency. A higher Main Oscillator frequency will not improve
accuracy or any performance efficiency.
PWM SWITCHING FREQUENCY CONSIDERATIONS
There are several considerations when choosing the PWM switching frequency.
Minimum On Time
Minimum on time determines the minimum duty cycle at the specific switching frequency. The
minimum on time for the XRP7708 is 40ns.
55V5[5V5Z5b5Z 575b5a5f 565f5P5Y5R% = 5@5V5[5V5Z5b5Z 5\5[5a5V5Z5R ?5C5J5@ 595_5R5^5b5R5[5P5f ?100
As an example the minimum duty cycle is 4% for 1MHz PWM frequency. This is important since the
minimum on time dictates the maximum conversion ratio that the PWM controller can achieve.
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