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參數資料
| 型號： | XRP7740ILBTR-F |
| 廠商： | Exar Corporation |
| 文件頁數： | 7/28頁 |
| 文件大小： | 1610K |
| 描述： | IC REG 5OUT BCK/LINEAR 40TQFN |
| 產品變化通告： | Packing Change 15/Oct/2010 |
| 標準包裝： | 3,000 |
| 系列： | PowerXR |
| 拓撲： | 降壓（降壓）同步（4），線性（LDO）（1） |
| 功能： | 任何功能 |
| 輸出數： | 5 |
| 頻率 - 開關： | 1.5MHz |
| 電壓/電流 - 輸出 1： | 控制器 |
| 電壓/電流 - 輸出 2： | 控制器 |
| 電壓/電流 - 輸出 3： | 控制器 |
| 帶 LED 驅動器： | 無 |
| 帶監控器： | 無 |
| 帶序列發生器： | 是 |
| 電源電壓： | 6.5 V ~ 20 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 40-TQFN（6x6） |
| 包裝： | 帶卷 (TR) |
| 配用： | 1016-1352-ND - EVAL BOARD FOR XRP7740 1016-1344-ND - IN-SOCKET PROG BRD VIA USB/GUI |
第1頁第2頁第3頁第4頁第5頁第6頁當前第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
X
X
R
R
P
P
7
7
7
7
0
0
8
8
a
a
n
n
d
d
X
X
R
R
P
P
7
7
7
7
4
4
0
0
Q
Q
u
u
a
a
d
d
C
C
h
h
a
a
n
n
n
n
e
e
l
l
D
D
i
i
g
g
i
i
t
t
a
a
l
l
P
P
W
W
M
M
S
S
t
t
e
e
p
p
D
D
o
o
w
w
n
n
C
C
o
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?2012 Exar Corporation
7/28
Rev. 1.2.2
Name
Pin Number
Description
DGND
10
Digital Ground. This pin should be connected to the ground plane at the exposed pad with
a separate trace.
AGND
11
Analog Ground. This pin should be connected to the ground plane at the exposed pad with
a separate trace
GL1-GL4
35,30,17,22
Output pin of the low side gate driver. Connect directly to the respective gate of an
external N-channel MOSFET.
GH1-GH4
33,28,19,24
Output pin of the high side gate driver. Connect directly to the respective gate of an
external N-channel MOSFET.
LX1-LX4
34,29,18,23
Lower supply rail for the high-side gate driver (GHx). Connect this pin to the switching
node at the junction between the two external power MOSFETs and the inductor. These
pins are also used to measure voltage drop across bottom MOSFETs in order to provide
output current information to the control engine.
BST1-BST4
32,27,20,25
High side driver supply pin(s). Connect BST to an external boost diode and a capacitor as
shown in the front page diagram.
The high side driver is connected between the BST pin and LX pin.
GPIO0-GPIO3
3,4,5,6
These pins can be configured as inputs or outputs to implement custom flags, power good
signals and enable/disable controls. A GPIO pin can also be programmed as an input clock
synchronizing IC to external clock. Refer to the GPIO Pins Section and the External
Clock Synchronization Section for more information.
GPIO4_SDA,
PI
L
7,8
I
2
C serial interface communication pins. These pins can be re-programmed to perform
GPIO functions in applications when I
2
C bus is not used.
VOUT1-VOUT4
12,13,14,15
Voltage sense.
Connect to the output of the corresponding power stage.
LDOOUT
40
Output of the Standby LDO. It can be configured as a 5V or 3.3V output. A compensation
capacitor should be used on this pin [see Application Note].
ENABLE
9
If ENABLE is pulled high, the chip powers up (logic reset, registers configuration loaded,
etc.). If pulled low for longer than 100us, the XRP7708/40 is placed into shutdown. See
applications section for proper sequencing of this pin.
A ND
Exposed Pad Analog Ground. Connect to analog ground (as noted above for pin 11).
ORDERING INFORMATION
Part Number
Junction Temp
Range
Marking
Package
Packing
Quantity
Note 1
Default I
2
C
Address
XRP7708ILB- F
-40癈dT
J
d+125癈
XRP7708ILB
40-pin TQFN
Bulk
Halogen Free
XRP7708ILBTR-F
-40癈dT
J
d+125癈
XRP7708ILB
YYWW X
40-pin TQFN 3K/Tape & Reel Halogen Free
XRP7740ILB- F
-40癈dTJd+125癈
XRP7740ILB
YYWW X
40-pin TQFN
Bulk
Halogen Free
XRP7740ILBTR-F
-40癈dT
J
d+125癈
XRP7740ILB
YYWW X
40-pin TQFN
3K/Tape & Reel
Halogen Free
XRP7740ILB-0X180-F -40癈dT
J
d+125癈
XRP7740ILB
YYWW X
0X18
40-pin TQFN
Bulk
Halogen Free
0X18
XRP7740ILBTR-0X18-F
-40癈dT
J
d+125癈
XRP7740ILB
YYWW X
40-pin TQFN 3K/Tape & Reel
Halogen Free
0X18
RP77 Ev l i n B r
RP774 EVB
XRP7740 Evaluation Board
YY = Year WW = Work Week X = Lot Number
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