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參數資料
| 型號： | XRT91L82 |
| 廠商： | Exar Corporation |
| 英文描述： | 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| 中文描述： | 2.488/2.666 Gbps的STS-48/STM-16的SONET / SDH收發器 |
| 文件頁數： | 1/59頁 |
| 文件大小： | 414K |
| 代理商： | XRT91L82 |
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Exar
Corporation 48720 Kato Road, Fremont CA, 94538
(510) 668-7000
FAX (510) 668-7017
www.exar.com
xr
PRELIMINARY
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82
APRIL 2005
GENERAL DESCRIPTION
REV. P1.0.5
The XRT91L82 is a fully integrated SONET/SDH
transceiver for OC-48/STM16 applications supporting
the use of Forward Error Correction (FEC) capability.
The transceiver includes an on-chip Clock Multiplier
Unit (CMU), which uses a high frequency Phase-
Locked Loop (PLL) to generate the high-speed
transmit serial clock from slower external clock
references. It also provides Clock and Data Recovery
(CDR) functions by synchronizing its on-chip Voltage
Controlled Oscillator (VCO) to the incoming serial
data stream. The chip provides serial-to-parallel and
parallel-to-serial converters and 16-bit Differential
LVDS/LVPECL, or Single-Ended LVPECL system
interfaces in both receive and transmit directions.
The transmit section includes a 16x9 Elastic Buffer
(FIFO) to absorb any phase differences between the
transmitter clock input and the internally generated
transmitter reference clock. In the event of an
overflow, an internal FIFO control circuit outputs an
OVERFLOW indication. The FIFO under the control
of the FIFO_AUTORST register bit can automatically
recover from an overflow condition. The operation of
the device can be monitored by checking the status
of the LOCKDET_CMU and LOCKDET_CDR output
signals. An on-chip phase/frequency detector and
charge-pump offers the ability to form a de-jittering
PLL with an external VCXO that can be used in loop
timing mode to clean up the recovered clock in the
receive section.
APPLICATIONS
SONET/SDH-based Transmission Systems
Add/Drop Multiplexers
Cross Connect Equipment
ATM and Multi-Service Switches, Routers and
Switch/Routers
DSLAMS
SONET/SDH Test Equipment
DWDM Termination Equipment
F
IGURE
1. B
LOCK
D
IAGRAM
OF
XRT91L82
PISO
(Parallel Input
Serial Output)
PFD
& Charge Pump
S
S
Serial
Microprocessor
Hardware
Control
I
S
R
H
T
D
R
L
P
TXDI[15:0]P/N
TXPCLKIP/N
DLOOP
RLOOPP
RXDO[15:0]P/N
RXPCLKOP/N
1
RP
WP
SIPO
(Serial Input
Parallel Output)
RLOOPS
CDR
Re-Timer
CMU
TXOP/N
RXIP/N
R
R
R
R
I
R
TXPCLKOP/N
TXCLKO16P/N
TXCLKO16SEL
L
FIFO_RST
DISRDCLK
L
S
P
DISRD
STS-48 TRANSCEIVER
C
P
JTAG
TDO
TDI
TCK
TMS
TRST
16
16
P
S
S
Div by
16
Div by
16
TXSCLKOP/N
X
X
T
C
OVERFLOW
R
相關PDF資料 |
PDF描述 |
|---|---|
| XRT91L82IB | 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT94L31_07 | 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC |
| XRT94L31 | 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER |
| XRT94L31IB | 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER |
| XRT94L43A | SONET/SDH OC-12 TO 12XDS3/E3 MAPPER |
相關代理商/技術參數 |
參數描述 |
|---|---|
| XRT91L82ES | 功能描述:總線收發器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT91L82IB | 功能描述:總線收發器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT91L82IB-F | 功能描述:總線收發器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT94L31 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC |
| XRT94L31_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC |
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