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參數資料
型號: 49LF002
廠商: Silicon Storage Technology, Inc.
英文描述: 2 Mbit / 3 Mbit / 4 Mbit / 8 Mbit Firmware Hub
中文描述: 2兆位/ 3兆/ 4兆位/ 8兆固件集線器
文件頁數: 11/36頁
文件大小: 412K
代理商: 49LF002
Advance Information
2 Mbit / 3 Mbit / 4 Mbit / 8 Mbit Firmware Hub
SST49LF002A / SST49LF003A / SST49LF004A / SST49LF008A
19
2001 Silicon Storage Technology, Inc.
S71161-06-000
9/01
504
Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Absolute Maximum
Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation
of the device at these conditions or conditions greater than those defined in the operational sections of this data
sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.)
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
D. C. Voltage on Any Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VDD+0.5V
Transient Voltage (<20 ns) on Any Pin to Ground Potential1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.0V to VDD+2.0V
Package Power Dissipation Capability (Ta=25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0W
Surface Mount Lead Soldering Temperature (3 Seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240°C
Output Short Circuit Current2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
1. Do not violate processor or chipset limitations on the INIT# pin.
2. Outputs shorted for no more than one second. No more than one output shorted at a time. This note applies to non-PCI outputs.
OPERATING RANGE
Range
Ambient Temp
VDD
Commercial
0°C to +85°C
3.0-3.6V
AC CONDITIONS OF TEST1
1. FWH interface signals use PCI load test conditions
Input Rise/Fall Time . . . . . . . . . . . . . . . 3 ns
Output Load . . . . . . . . . . . . . . . . . . . . . CL = 30 pF
See Figures 24 and 25
TABLE 11: DC OPERATING CHARACTERISTICS (ALL INTERFACE)
Symbol
Parameter
Limits
Test Conditions
Min
Max
Units
IDD
Power Supply Current
Address input=VIL/VIH, at F=1/TRC Min,
VDD=VDD Max (PP Mode)
Read
12
mA
OE#=
VIH, WE#=VIH
Write
24
mA
OE#=
VIH, WE#=VIL, VDD=VDD Max (PP Mode)
ISB
Standby VDD Current
(FWH Interface)
100
A
FWH4=0.9VDD, f=33 MHz VDD=VDD Max, All
other inputs
≥ 0.9 VDD or ≤ 0.1 VDD
IRY1
1. The device is in Ready Mode when no activity is on the FWH bus.
Ready Mode VDD Current
(FWH Interface)
10
mA
FWH4=VIL, f=33 MHz VDD=VDD Max All other
inputs
≥ 0.9 VDD or ≤ 0.1 VDD
II
Input Current for IC,
ID [3:0] pins
200
A
VIN=GND to VDD, VDD=VDD Max
ILI
Input Leakage Current
1
A
VIN=GND to VDD, VDD=VDD Max
ILO
Output Leakage Current
1
A
VOUT=GND to VDD, VDD=VDD Max
VIHI2
2. Do not violate processor or chipset specification regarding INIT# voltage.
INIT# Input High Voltage
1.0
VDD+0.5
V
VDD=VDD Max
VILI2
INIT# Input Low Voltage
-0.5
0.4
V
VDD=VDD Min
VIL
Input Low Voltage
-0.5
0.3 VDD
VVDD=VDD Min
VIH
Input High Voltage
0.5 VDD
VDD+0.5
V
VDD=VDD Max
VOL
Output Low Voltage
0.1 VDD
VIOL=1500A, VDD=VDD Min
VOH
Output High Voltage
0.9 VDD
VIOH=-500 A, VDD=VDD Min
T11.8 504
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