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參數(shù)資料
| 型號(hào)： | 5962-8875701EA |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PHASE LOCKED LOOP, 38 MHz, CDIP16 |
| 封裝： | CERAMIC, DIP-16 |
| 文件頁(yè)數(shù)： | 32/32頁(yè) |
| 文件大小： | 687K |
| 代理商： | 5962-8875701EA |
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9
SIGIN, COMPIN
DC Coupled
Low-Level Input
Voltage
VIL
-
4.5 to
5.5
-
0.8
-
0.8
-
0.8
V
PCPOUT, PCn OUT
High-Level Output
Voltage
CMOS Loads
VOH
VIL or VIH
-
4.5
4.4
-
4.4
-
4.4
-
V
PCPOUT, PCn OUT
High-Level Output
Voltage
TTL Loads
VOH
VIL or VIH
-
4.5
3.98
-
3.84
-
3.7
-
V
PCPOUT, PCn OUT
Low-Level Output
Voltage
CMOS Loads
VOL
VIL or VIH
-
4.5
-
0.1
-
0.1
-
0.1
V
PCPOUT, PCn OUT
Low-Level Output
Voltage
TTL Loads
VOL
VIL or VIH
-
4.5
-
0.26
-
0.33
-
0.4
V
SIGIN, COMPIN Input
Leakage Current
II
Any
Voltage
Between
VCC and
GND
-
5.5
-
±30
±38
±45
A
PC2OUT Three-State
Off-State Current
IOZ
VIL or VIH
-
5.5
-
±0.5
±5-
-
±10
A
SIGIN, COMPIN Input
Resistance
RI
VI at Self-Bias
Operation Point:
VI = 0.5V,
See Figure 10
4.5
-
250
-
k
DEMODULATOR SECTION
Resistor Range
RS
at RS > 300k
Leakage Current
Can Influence
VDEM OUT
4.5
5
-
300
-
k
Offset Voltage VCOIN
to VDEM
VOFF
VI = VVCO IN =
Values taken over
RS Range
See Figure 23
4.5
-
±20
-
mV
Dynamic Output
Resistance at
DEMOUT
RD
VDEM OUT =
4.5
-
25
-
Quiescent Device
Current
ICC
VCC or
GND
-
5.5
-
8
-
80
-
160
A
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
ICC
(Note 4)
VCC
-2.1
Excluding
Pin 5
-
4.5 to
5.5
-
100
360
-
450
-
490
A
NOTES:
2. The value for R1 and R2 in parallel should exceed 2.7k
.
3. The maximum operating voltage can be as high as VCC -0.9V, however, this may result in an increased offset voltage.
4. For dual-supply systems theoretical worst case (VI = 2.4V, VCC = 5.5V) specification is 1.8mA.
DC Electrical Specications (Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
VCC
(V)
25oC
-40oC TO 85oC -55oC TO 125oC
UNITS
VI (V)
IO (mA)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
VCC
2
VCC
2
CD54HC4046A, CD74HC4046A, CD54HCT4046A, CD74HCT4046A
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