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參數(shù)資料
| 型號(hào)： | 5962-8990503EA |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 2.2 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, CDIP16 |
| 封裝： | DIP-16 |
| 文件頁(yè)數(shù)： | 16/19頁(yè) |
| 文件大小： | 623K |
| 代理商： | 5962-8990503EA |
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6
UVLO, SOFT START AND FAULT MANAGEMENT
Soft start is programmed by a capacitor on the SS pin. At
power up, SS is discharged. When SS is low, the error amp
output is also forced low. As the internal 9
A source
charges the SS pin, the error amp output follows until
closed loop regulation takes over.
Anytime ILIM exceeds 1.2V, the fault latch will be set and
the output pins will be driven low. The soft start cap is then
discharged by a 250
A current sink. No more output
pulses are allowed until soft start is fully discharged, and
ILIM is below 1.2V. At this point the fault latch will be re-
set and the chip will execute a soft start.
Should the fault latch be set during soft start, the outputs
will be immediately terminated, but the soft start cap will
not be discharged until it has been fully charged. This re-
sults in a controlled hiccup interval for continuous fault con-
ditions.
UC1823A,B/1825A,B
UC2823A,B/2825A,B
UC3823A,B/3825A,B
APPLICATIONS INFORMATION (cont.)
Soft Start and Fault Waveforms
UDG-95106
ACTIVE LOW OUTPUTS DURING UVLO
The UVLO function forces the outputs to be low and con-
siders both VCC and VREF before allowing the chip to
operate.
Output V and I During UVLO
Simplified Schematic
PWM APPLICATIONS
Current Mode
Voltage Mode
UDG-95107
UDG-95108
UDG-95109
UDG-95110
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