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參數資料
| 型號： | 5962F9676701VXC |
| 廠商： | INTERSIL CORP |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 1 CHANNEL, VIDEO AMPLIFIER, CDFP8 |
| 封裝： | ROHS COMPLIANT, GLASS, FP-8 |
| 文件頁數： | 4/9頁 |
| 文件大小： | 252K |
| 代理商： | 5962F9676701VXC |
4
FN4099.3
April 6, 2009
recovery time. The appropriate propagation delays are 4.0ns
for the unclamped pulse, and 4.8ns for the clamped (2X
overdrive) pulse yielding an overdrive recovery time of
800ps. The measurement uses the 90% point of the output
transition to ensure that linear operation has resumed. Note:
The propagation delay illustrated is dominated by the
fixturing. The delta shown is accurate, but the true
HS-1135RH propagation delay is 500ps.
Use of Die in Hybrid Applications
This amplifier is designed with compensation to negate the
package parasitics that typically lead to instabilities. As a
result, the use of die in hybrid applications results in
overcompensated performance due to lower parasitic
capacitances. Reducing RF below the recommended values
for packaged units will solve the problem. For AV = +2 the
recommended starting point is 300
Ω, while unity gain
applications should try 400
Ω.
PC Board Layout
The frequency performance of this amplifier depends a great
deal on the amount of care taken in designing the PC board.
The use of low inductance components such as chip
resistors and chip capacitors is strongly recommended,
while a solid ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10F) tantalum in parallel with a small value
chip (0.1F) capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the
input and output of the device. Output capacitance, such as
that resulting from an improperly terminated transmission
line will degrade the frequency response of the amplifier and
may cause oscillations. In most cases, the oscillation can be
avoided by placing a resistor in series with the output.
Care must also be taken to minimize the capacitance to
ground seen by the amplifier’s inverting input. The larger this
capacitance, the worse the gain peaking, resulting in pulse
overshoot and possible instability. To this end, it is
recommended that the ground plane be removed under
traces connected to pin 2, and connections to pin 2 should
be kept as short as possible.
An example of a good high frequency layout is the
Evaluation Board shown in Figure 2.
Evaluation Board
An evaluation board is available for the HS-1135RH,
(HFA11XXEVAL). Please contact your local sales office for
information.
The layout and schematic of the board are shown in the
following:
FIGURE 2A. TOP LAYOUT
FIGURE 2B. BOTTOM LAYOUT
FIGURE 2C. SCHEMATIC
FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT
VH
+IN
VL
V+
GND
1
V-
OUT
1
2
3
4
8
7
6
5
+5V
10F
0.1F
VH
50
Ω
GND
500
Ω
500
Ω
-5V
0.1F
10F
50
Ω
IN
OUT
VL
HS-1135RH
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