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參數資料
| 型號： | 62LV1024SC |
| 廠商： | BRILLIANCE SEMICONDUCTOR, INC. |
| 元件分類： | SRAM |
| 英文描述： | Very Low Power/Voltage CMOS SRAM 128K X 8 bit |
| 中文描述： | 非常低功率/電壓CMOS SRAM的128K的× 8位 |
| 文件頁數： | 5/11頁 |
| 文件大小： | 383K |
| 代理商： | 62LV1024SC |
Revision 2.2
April 2001
5
R0201-BS62LV1024
READ CYCLE3
(1,4)
READ CYCLE2
(1,3,4)
NOTES:
1. WE is high in read Cycle.
2. Device is continuously selected when CE1 = V
IL
and CE2= V
IH.
3. Address valid prior to or coincident with CE1 transition low and/or CE2 transition high.
4. OE = V
IL
.
5. Transition is measured 500mV from steady state with C
L
= 5pF as shown in Figure 1B.
The parameter is guaranteed but not 100% tested.
BSI
SWITCHING WAVEFORMS (READ CYCLE)
READ CYCLE1
(1,2,4)
t
RC
t
OH
t
AA
D
OUT
ADDRESS
t
OH
t
CLZ
(5)
D
OUT
CE2
CE1
(5)
t
ACS2
t
ACS1
t
OH
t
RC
t
OE
t
CLZ2
t
CHZ2
(2,5)
D
OUT
CE2
CE1
OE
ADDRESS
(5)
t
CLZ1
(5)
t
ACS1
t
ACS2
t
CHZ1
(1,5)
t
OHZ
(5)
t
OLZ
t
AA
BS62LV1024
t
CHZ1,
t
CHZ2
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