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參數資料
| 型號： | 62WV5128ALL |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | 512K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM |
| 中文描述： | 為512k × 8低電壓，超低功耗的CMOS靜態RAM |
| 文件頁數： | 6/14頁 |
| 文件大小： | 83K |
| 代理商： | 62WV5128ALL |
6
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A
04/30/03
IS62WV5128ALL, IS62WV5128BLL
ISSI
AC WAVEFORMS
READ CYCLE NO. 1
(1,2)
(Address Controlled) (
CS1
=
OE
= V
IL
,
WE
= V
IH
)
DATA VALID
PREVIOUS DATA VALID
t
AA
t
OHA
t
OHA
t
RC
D
OUT
ADDRESS
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
55 ns
70 ns
Symbol
t
RC
t
AA
t
OHA
t
ACS1
t
DOE
t
HZOE
(2)
t
LZOE
(2)
t
HZCS1
t
LZCS1
Parameter
Min.
Max.
Min.
Max.
Unit
Read Cycle Time
55
—
70
—
ns
Address Access Time
—
55
—
70
ns
Output Hold Time
10
—
10
—
ns
CS1
Access Time
—
55
—
70
ns
OE
Access Time
—
25
—
35
ns
OE
to High-Z Output
—
20
—
25
ns
OE
to Low-Z Output
5
—
5
—
ns
CS1
to High-Z Output
0
20
0
25
ns
CS1
to Low-Z Output
10
—
10
—
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4 to
V
DD
-0.2V/V
DD
-0.3V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
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