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參數資料
| 型號： | 7106G-R40-T |
| 廠商： | UNISONIC TECHNOLOGIES CO LTD |
| 元件分類： | ADC |
| 英文描述： | 1-CH PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO40 |
| 封裝： | HALOGEN FREE, SSOP-40 |
| 文件頁數： | 15/18頁 |
| 文件大小： | 438K |
| 代理商： | 7106G-R40-T |
7106
CMOS IC
UNISONICTECHNOLOGIESCO.,LTD
6 of 18
www.unisonic.com.tw
QW-R502-018.D
DESIGN INFORMATION SUMMARY SHEET
*OSCILLATOR FREQUENCY
fosc=0.45/RC
COSC>50pF, ROSC>50k
fOSC (Typ)=48kHz
*OSCILLATOR PERIOD
tOSC=RC/0.45
*INTEGRATION CLOCK FREQUENCY
fCLOCK=fOSC/4
*INTEGRATION PERIOD
tINT=1000×(4/fOSC)
*60/50Hz REJECTION CRITERION
tINT/t60Hz or tINT/t50Hz=Integer
*OPTIMUM INTEGRATION CURRENT
IINT=4μA
*FULL SCALE ANALOG INPUT VOLTAGE
VINFS (Typ)=200mV or 2V
*INTEGRATE ESISTOR
RINT= VINFS/ IINT
*INTEGRATE CAPACITOR
CINT=(tINT)(IINT)/ VINT
*INTEGRATOR OUTPUT VOLTAGE SWING
VINT=(tINT)(IINT)/ CINT
*VINT MAXIMUM SWING
(V- + 0.5V)<VINT<(V+ - 0.5V), VINT (Typ)=2V
*DISPLAY COUNT
COUNT=1000×VIN/VREF
*CONVERSION CYCLE
tCYC=tCLOCK×4000
tCYC=tOSC×16,000
When fOSC=48kHz, tCYC=333ms
*COMMON MODE INPUT VOLTAGE
(V- + 1V)<VIN<(V+ - 0.5V)
*AUTO-ZERO CAPACITOR
0.01μF<CAZ<1μF
*REFERENCE CAPACITOR
0.1μF<CREF<1μF
*VCOM
Biased between Vi and V-
*VCOM V+
≒
- 2.8V
Regulation lost when V+ to V- < 6.8V
≒
If VCOM is externally pulled down to (V+ to V-)/2, the VCOM circuit will turn off.
*POWER SUPPLY: SINGLE 9V
V+ - V- =9V
VGND V+
≒
- 4.5V
Digital supply is generated by internal parts.
*DISPLAY: LCD
Type: Direct drive with digital logic supply amplitude.
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