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參數資料
型號: 71M6541D-IGT/F
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 模擬信號調理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP64
封裝: LEAD FREE, LQFP-64
文件頁數: 147/165頁
文件大小: 2208K
代理商: 71M6541D-IGT/F
82
2008–2011 Teridian Semiconductor Corporation
v1.1
Transitions from both LCD and SLP mode to BRN mode can be initiated by the following events:
Wake-up timer timeout.
Pushbutton (PB) is activated.
A rising edge on SEGDIO4, SEGDIO52 (71M6542F only) or SEGDIO55.
Activity on the RX or OPT_RX pins.
The MPU has access to a variety of registers that signal the event that caused the wake up. See 3.4
Wake Up Behavior for details.
Table 67 shows the circuit functions available in each operating mode.
Table 67: Available Circuit Functions
Circuit Function
System Power
Battery Power
MSN (Mission Mode)
BRN (Brownout Mode)
LCD
SLEEP
PLL_FAST=1
PLL_FAST=0
PLL_FAST=1
PLL_FAST=0
CE (Computation Engine)
Yes
Note 1
--
2
--
FIR
Yes
--
ADC, VREF
Yes
--
PLL
Yes
Boost
2
--
Battery Measurement
Yes
--
Temperature sensor
Yes
Max MPU clock rate
4.92MHz
(from PLL)
1.57MHz
(from PLL)
4.92MHz
(from PLL)
1.57MHz
(from PLL)
--
MPU_DIV clk. divider
Yes
--
ICE
Yes
--
DIO Pins
Yes
--
Watchdog Timer
Yes
--
LCD
Yes
--
LCD Boost
Yes
EEPROM Interface (2-wire)
Yes
--
EEPROM Interface (3-wire)
Yes
--
UART (full speed)
Yes
--
Optical TX modulation
38.4kHz
38.9kHz
38.4kHz
38.9kHz
--
Flash Read
Yes
--
Flash Page Erase
Yes
--
Flash Write
Yes
--
RAM Read and Write
Yes
--
Wakeup Timer
Yes
OSC and RTC
Yes
DRAM data preservation
Yes
--
NV RAM data preservation
Yes
Notes:
1.
The CE is active in BRN mode, but ADC data is inaccurate. The MPU should halt the CE to conserve power (CE_E = 0,
I/O RAM 0x2106[0]).
2.
“--“ indicates that the corresponding circuit is not active
3.
“Boost” implies that the LCD boost circuit is active (i.e., LCD_VMODE[1:0] = 10 (I/O RAM 0x2401[7:6]). The LCD boost
circuit requires a clock from the PLL to function. Thus, the PLL is automatically kept active if LCD boost is active while in
LCD mode, otherwise the PLL is de-activated.
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