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參數資料
| 型號： | 71M6541D-IGTR/F |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP64 |
| 封裝： | LEAD FREE, LQFP-64 |
| 文件頁數： | 57/165頁 |
| 文件大小： | 2208K |
| 代理商： | 71M6541D-IGTR/F |
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v1.1
2008–2011 Teridian Semiconductor Corporation
15
is useful when current sensors with low sensitivity, such as shunt resistors, are used. With PRE_E set, the
IAP-IAN input signal amplitude is restricted to 31.25 mV peak.
For the 71M654x application utilizing two shunt resistor sensors (Figure 3), the IAP-IAN pins are configured
for differential mode to interface to a local shunt by setting the DIFFA_E control bit. Meanwhile, the IBP-IBN
pins are re-configured as digital balanced pair to communicate with a Teridian 71M6x01 Isolated Sensor
interface by setting the RMT_E control bit (I/O RAM 0x2709[3]). The 71M6x01 communicates with the
71M654x using a bi-directional digital data stream through an isolating low-cost pulse transformer. The
71M654x also supplies power to the 71M6x01 through the isolating transformer. This type of interface is
further described at the end of this chapter (see 2.2.8 71M6x01 Isolated Sensor Interface (Remote Sensor
For use with Current Transformers (CTs), as shown in Figure 2, the RMT_E control bit is reset, so that the
IBP-IBN pins are configured as local analog inputs. The IAP-IAN pins cannot be configured as a remote
sensor interface.
2.2.2
Input Multiplexer
When operating with local sensors, the input multiplexer sequentially applies the input signals from the analog
input pins to the input of the ADC (see Figure 2 and Figure 4). One complete sampling sequence is called a
multiplexer frame. The multiplexer of the 71M6541D/F can select up to three input signals (IAP-IAN, VA, and
IBP-IBN) per multiplexer frame as controlled by the I/O RAM control field MUX_DIV[3:0] (I/O RAM
0x2100[7:4]) (see Figure 6). The multiplexer of the 71M6542F adds the VB signal to achieve a total of
four inputs (see Figure 7). The multiplexer always starts at state 1 and proceeds until as many states
as determined by MUX_DIV[3:0] have been converted.
The 71M6541D/F and 71M6542F each require a unique CE code that is written for the specific
application. Moreover, each CE code requires specific AFE and MUX settings in order to function
properly. Table 1 provides the CE code and settings corresponding to the local sensor configurations
Table 1. Required CE Code and Settings for Local Sensors
I/O RAM
Mnemonic
I/O RAM
Location
71M6541D/E
(hex)
71M6542F
(hex)
Eq. 0 or 1
Eq. 2
FIR_LEN[1:0]
210C[2:1]
1
2
ADC_DIV
2200[5]
1
0
PLL_FAST
2200[4]
1
MUX_DIV[3:0]
2100[7:4]
3
4
MUX0_SEL[3:0]
2105[3:0]
0
MUX1_SEL[3:0]
2105[7:4]
A
MUX2_SEL[3:0]
2104[3:0]
2
MUX3_SEL[3:0]
2104[7:4]
1
9
RMT_E
2709[3]
0
DIFFA_E
210C[4]
1
DIFFB_E
210C[5]
1
EQU[2:0]
2106[7:5]
0 or 1
2
CE Code
--
CE41A01
CE41A04
Equations
--
0 or 1
2
Current Sensor Types
--
1 Shunt and 1 CT
or
2 CTs
1 Shunt and 1 CT
or
2 CTs
1 Shunt and 1 CT
or
2 CTs
Applicable Figure
--
Notes:
TERIDIAN updates the CE code periodically. Please contact your local TERIDIAN representative to obtain the latest
CE code and the associated settings. The configuration presented in this table is set by the MPU demonstration code
during initialization.
Table 2. Required CE Code and Settings for 71M6x01 isolated Sensor
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