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參數資料
| 型號： | 71M6542F-IGTR/F |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP100 |
| 封裝： | LEAD FREE, LQFP-100 |
| 文件頁數： | 77/165頁 |
| 文件大小： | 2208K |
| 代理商： | 71M6542F-IGTR/F |
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v1.1
2008–2011 Teridian Semiconductor Corporation
19
Table 4 summarizes the I/O RAM registers used for configuring the multiplexer, signals pins, and ADC.
All listed registers are 0 after reset and wake from battery modes, and are readable and writable.
Table 4: Multiplexer and ADC Configuration Bits
Name
Location
Description
MUX0_SEL[3:0]
2105[3:0]
Selects the ADC input converted during time slot 0.
MUX1_SEL[3:0]
2105[7:4]
Selects the ADC input converted during time slot 1.
MUX2_SEL[3:0]
2104[3:0]
Selects the ADC input converted during time slot 2.
MUX3_SEL[3:0]
2104[7:4]
Selects the ADC input converted during time slot 3.
MUX4_SEL[3:0]
2103[3:0]
Selects the ADC input converted during time slot 4.
MUX5_SEL[3:0]
2103[7:4]
Selects the ADC input converted during time slot 5.
MUX6_SEL[3:0]
2102[3:0]
Selects the ADC input converted during time slot 6.
MUX7_SEL[3:0]
2102[7:0]
Selects the ADC input converted during time slot 7.
MUX8_SEL[3:0]
2101[3:0]
Selects the ADC input converted during time slot 8.
MUX9_SEL[3:0]
2101[7:0]
Selects the ADC input converted during time slot 9.
MUX10_SEL[3:0]
2100[3:0]
Selects the ADC input converted during time slot 10.
ADC_DIV
2200[5]
Controls the rate of the ADC and FIR clocks.
MUX_DIV[3:0]
2100[7:4]
The number of ADC time slots in each multiplexer frame (maximum = 11).
PLL_FAST
2200[4]
Controls the speed of the PLL and MCK.
FIR_LEN[1:0]
210C[1]
Determines the number of ADC cycles in the ADC decimation FIR filter.
DIFFA_E
210C[4]
Enables the differential configuration for analog input pins IAP-IAN.
DIFFB_E
210C[5]
Enables the differential configuration for analog input pins IBP-IBN.
RMT_E
2709[3]
Enables the remote sensor interface transforming pins IBP-IBN into a
digital balanced differential pair for communications with the 71M6x01
sensor.
PRE_E
2704[5]
Enables the 8x pre-amplifier.
2.2.3
Delay Compensation
When measuring the energy of a phase (i.e., Wh and VARh) in a service, the voltage and current for that
phase must be sampled at the same instant. Otherwise, the phase difference,
Ф, introduces errors.
o
delay
o
delay
f
t
T
t
360
=
=
φ
Where f is the frequency of the input signal, T = 1/f and tdelay is the sampling delay between current and
voltage.
Traditionally, sampling is accomplished by using two A/D converters per phase (one for voltage and the
other one for current) controlled to sample simultaneously. Teridian’s Single-Converter Technology,
however, exploits the 32-bit signal processing capability of its CE to implement “constant delay” all-pass
filters. The all-pass filter corrects for the conversion time difference between the voltage and the
corresponding current samples that are obtained with a single multiplexed A/D converter.
The “constant delay” all-pass filter provides a broad-band delay 360
o –
θ, which is precisely matched to
the difference in sample time between the voltage and the current of a given phase. This digital filter
does not affect the amplitude of the signal, but provides a precisely controlled phase response.
The recommended ADC multiplexer sequence samples the current first, immediately followed by
sampling of the corresponding phase voltage, thus the voltage is delayed by a phase angle
Ф relative to
the current. The delay compensation implemented in the CE aligns the voltage samples with their
corresponding current samples by first delaying the current samples by one full sample interval (i.e.,
360
o), then routing the voltage samples through the all-pass filter, thus delaying the voltage samples by
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相關代理商/技術參數 |
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| 71M6542FT-IGT/F | 制造商:Maxim Integrated Products 功能描述:1-PHASE SOC 128KB WITH PREC TEMP SENSOR - Rail/Tube |
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| 71M6542G | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:71M6541D/71M6541F/71M6541G/71M6542F/71M6542G 是 TeridianTM 的第4 代高集成度單相電表SoC |
| 71M6542G-IGT/F | 功能描述:計量片上系統 - SoC 1-Phase Metering SOC with 128KB Flash RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數據 RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數量:12 片上 ADC: 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
| 71M6542G-IGTR/F | 制造商:Maxim Integrated Products 功能描述:- Tape and Reel |
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