- 您現在的位置：買賣IC網 > PDF目錄68812 > 71M6543GH-IGTR/F (MAXIM INTEGRATED PRODUCTS INC) SPECIALTY ANALOG CIRCUIT, PQFP100 PDF資料下載
參數資料
| 型號： | 71M6543GH-IGTR/F |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP100 |
| 封裝： | LEAD FREE, LQFP-100 |
| 文件頁數： | 108/157頁 |
| 文件大小： | 2178K |
| 代理商： | 71M6543GH-IGTR/F |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁當前第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁
71M6543F/H and 71M6543G/GH Data Sheet
54
2008–2011 Teridian Semiconductor Corporation
v1.2
limiter ensures that the resulting look-up address is in the 6-bit plus sign range of -64 to +63 (decimal).
The 8-bit NV RAM content pointed to by the address is added as a 2’s complement value to 0x40000,
the nominal value of 4*RTC_P[16:0] + RTC_Q[1:0].
Refer to 2.5.4.3 RTC Rate Control for information on the rate adjustments performed by registers
RTC_P[16:0] and RTC_Q[1:0]. The 8-bit values loaded in to NV RAM must be scaled correctly to produce
rate adjustments that are consistent with the equations given in 2.5.4.3 RTC Rate Control for RTC_P[16:0]
and RTC_Q[1:0]. Note that the sum of the looked-up 8-bit 2’s complement value and 0x40000 form a 19-
bit value, which is equal to 4*RTC_P[16:0] + RTC_Q[1:0], as shown in Figure 13. The output of the
Temperature Compensation is automatically loaded into the RTC_P[16:0] and RTC_Q[1:0] locations after
each look-up and summation operation.
Σ
0x40000
19
10+S
STEMP
>>2
63
-64
63
255
-256
LIMIT
Look Up
RAM
ADDR
6+S
8+S
Q
7+S
4*RTC_P+RTC_Q
19
Figure 13: Automatic Temperature Compensation
The 128 NV RAM locations are organized in 2’s complement format. As mentioned above, the
STEMP[10:0] digital temperature values are scaled such that the corresponding NV RAM addresses are
equal to STEMP[10:0]/4 (limited in the range of -64 to +63). See 2.5.5 71M6543 Temperature Sensor on
page 55 for the equations to calculate temperature in degrees °C from the STEMP[10:0] reading.
For proper operation, the MPU has to load the lookup table with values that reflect the crystal properties
with respect to temperature, which is typically done once during initialization. Since the lookup table is
not directly addressable, the MPU uses the following procedure to load the NV RAM table:
1.
Set the LKPAUTOI bit (I/O RAM 0x2887[7]) to enable address auto-increment.
2.
Write zero into the I/O RAM register LKPADDR[6:0] (I/O RAM 0x2887[6:0]).
3.
Write the 8-bit datum into I/O RAM register LKPDAT (I/O RAM 0x2888).
4.
Set the LKP_WR bit (I/O RAM 0x2889[0]) to write the 8-bit datum into NV_RAM
5.
Wait for LKP_WR to clear (LKP_WR auto-clears when the data has been copied to NV RAM).
6.
Repeat steps 3 through 5 until all data has been written to NV RAM.
The NV RAM table can also be read by writing a 1 into the LKP_RD bit (I/O RAM 0x2889[1]). The process
of reading from and writing to the NV RAM is accelerated by setting the LKPAUTOI bit (I/O RAM 0x2887[7]).
When LKPAUTOI is set, LKPADDR[6:0] (I/O RAM 0x2887[6:0]) auto-increments every time LKP_RD or
LKP_WR is pulsed. It is also possible to perform random access of the NV RAM by writing a 0 to the
LKPAUTOI bit and loading the desired address into LKPADDR[6:0].
If the oscillator temperature compensation feature is not being used, it is possible to use the NV
RAM storage area as ordinary battery-backed NV storage space using the procedure described
above to read and write NV RAM data. In this case, the OSC_COMP bit (I/O RAM 0x28A0[5]) is
reset to disable the automatic oscillator temperature compensation feature.
2.5.4.5 RTC Interrupts
The RTC generates interrupts each second and each minute. These interrupts are called RTC_1SEC
and RTC_1MIN. In addition, the RTC functions as an alarm clock by generating an interrupt when the
minutes and hours registers both equal their respective target counts as defined in . The alarm clock
interrupt is called RTC_T. All three interrupts appear in the MPU’s external interrupt 6. See Table 33 in the
interrupt section for the enable bits and flags for these interrupts.
The minute and hour target registers are listed in Table 45.
相關PDF資料 |
PDF描述 |
|---|---|
| 71M6543GH-IGT/F | SPECIALTY ANALOG CIRCUIT, PQFP100 |
| 71M6543G-IGT/F | SPECIALTY ANALOG CIRCUIT, PQFP100 |
| 722BG | 2-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| 722MG | 2-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| 73M1903-IGV | SPECIALTY CONSUMER CIRCUIT, PQFP32 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 71M6543GHT-IGT/F | 制造商:Maxim Integrated Products 功能描述:3-PHASE, 128KB, PRES TEMP SENSOR, HI PREC - Bulk |
| 71M6543GHT-IGTR/F | 制造商:Maxim Integrated Products 功能描述:3-PHASE, 128KB, PRES TEMP SENSOR, HI PREC - Tape and Reel |
| 71M6543G-IGT/F | 功能描述:計量片上系統 - SoC Precision Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數據 RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數量:12 片上 ADC: 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
| 71M6543G-IGTR/F | 功能描述:計量片上系統 - SoC Precision Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數據 RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數量:12 片上 ADC: 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
| 71M6543GT-IGT/F | 制造商:Maxim Integrated Products 功能描述:3-PHASE, 128KK, PRES TEMP SENSOR - Bulk |
發布緊急采購，3分鐘左右您將得到回復。