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參數資料
| 型號： | 72SD3232RPFK |
| 廠商： | MAXWELL TECHNOLOGIES |
| 元件分類： | DRAM |
| 英文描述： | 1 Gbit SDRAM 32-Meg X 32-Bit X 4-Banks |
| 中文描述： | 32M X 32 SYNCHRONOUS DRAM, 6 ns, DFP72 |
| 封裝： | STACK, DFP-72 |
| 文件頁數： | 1/41頁 |
| 文件大小： | 596K |
| 代理商： | 72SD3232RPFK |
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1
M
All data sheets are subject to change without notice
(858) 503-3300 - Fax: (858) 503-3301 - wwwmaxwell.com
1 Gbit SDRAM
32-Meg X 32-Bit X 4-Banks
2005 Maxwell Technologies
All rights reserved.
72SD3232
02.04.05 Rev 3
F
EATURES
:
1 Gigabit ( 32-Meg X 32-Bit X 4-Banks)
RAD-PAKradiation-hardened against natural space
radiation
Total Dose Hardness:
>100 krad (Si), depending upon space mssion
Excellent Single Event Effects:
SEL
TH
> 85 MeV/mg/cm
2
@
25
°
C
JEDEC Standard 3.3V Power Supply
Clock Frequency: 100 MHz Operation
Operating tremperature: -55 to +125
°
C
Auto Refresh
Single pulsed RAS
2 Burst Sequence variations
Sequential (BL =1/2/4/8)
Interleave (BL = 1/2/4/8)
Programmable CAS latency: 2/3
Power Down and Clock Suspend Modes
LVTTL Compatible Inputs and Outputs
Package: 72-Pin R
AD
-Stack
Package
D
ESCRIPTION
:
Maxwell Technologies’ Synchronous Dynamc Random
Access Memory (SDRAM) is ideally suited for space
applications requiring high performance computing and
high density memory storage. As mcroprocessors
increase in speed and demand for higher density mem-
ory escalates, SDRAMhas proven to be the ultimate
solution by providing bit-counts up to 1 Gigabits and
speeds up to 100 Megahertz. SDRAMs represent a sig-
nificant advantage in memory technology over traditional
SRAMs including the ability to burst data synchronously
at high rates with automatic column-address generation,
the ability to interleave between banks masking pre-
charge time, and the ability to randomy change column
address during each clock cycle.
Maxwell Technologies’ patented R
AD
-P
AK
packaging
technology incorporates radiation shielding in the mcro-
circuit package. It elimnates the need for box shielding
for a lifetime in orbit or space mssion. In a typical GEO
orbit, R
AD
-P
AK
provides greater than 100 krads(Si)
radiation dose tolerance. This product is available with
screening up to Maxwell Technologies self-defined Class
K.
Logic Diagram
(One Amplifier)
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| 7-2SDLSJ40 | 制造商:Cooper Bussmann 功能描述:CAPACITOR FUSEM, 7.2KV,40 - Bulk |
| 72T18105L10BB | 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Async/Sync Dual Depth/Width Uni-Dir 128K x 18/256K x 9 240-Pin BGA 制造商:Integrated Device Technology Inc 功能描述:FIFO ASYNC/SYNC DUAL DEPTH/WIDTH UNI-DIR 128KX18/256KX9 240B - Trays |
| 72T18105L4-4BB | 功能描述:先進先出 RoHS:否 制造商:IDT 電路數量: 數據總線寬度: 總線定向: 存儲容量: 定時類型: 組織: 最大時鐘頻率: 訪問時間: 電源電壓-最大: 電源電壓-最小: 最大工作電流: 最大工作溫度: 封裝 / 箱體: 封裝: |
| 72T18105L4-4BBG | 功能描述:先進先出 RoHS:否 制造商:IDT 電路數量: 數據總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| 72T18105L5BB | 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Async/Sync Dual Depth/Width Uni-Dir 128K x 18/256K x 9 240-Pin BGA 制造商:Integrated Device Technology Inc 功能描述:FIFO ASYNC/SYNC DUAL DEPTH/WIDTH UNI-DIR 128KX18/256KX9 240B - Trays |
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