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參數資料
| 型號： | 73S8010C-IM/F |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, QCC32 |
| 封裝： | 5 X 5 MM, LEAD FREE, QFN-32 |
| 文件頁數： | 26/27頁 |
| 文件大小： | 348K |
| 代理商： | 73S8010C-IM/F |
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73S8010C Data Sheet
DS_8010C_024
8
Rev. 1.5
ACK bit is sent to the master by the device. The master should send the STOP condition after receiving
the ACK bit.
Figure 2: I
2C Bus Write Protocol
2.2
Host Interface Status
Table 3 describes the Host Interface Status Register bits (power-on Reset = 0x04).
Table 3: Host Status Register
Name
Bit
Description
PRES
0
Set when the card is present; reset when the card is not present.
PRESL
1
Set when the PRES pin changes state (rising/falling edge); reset when the status
register is read. Generates an interrupt when set
I/O
2
Set when I/O is high; reset when I/O is low.
SUPL
3
Set when a voltage fault is detected; reset when the status register is read.
Generates an interrupt when set.
PROT
4
Set when an over-current or over-heating fault has occurred during a card session;
reset when the status register is read. Generates an interrupt when set.
MUTE
5
Set during ATR when the card has not answered during the ISO 7816-3 time
window (40000 card clock cycles); reset when the next session begins or this
register is read.
EARLY
6
Set during ATR when the card has answered before 400 card clock cycles; reset
when the next session begins or this register is read.
ACTIVE
7
Set when the card is active (VCC is on); reset when the card is inactive.
I
2C-bus Read from the Status Register:
The I
2C-bus Read Command from the Status Register follows the format shown in Figure 3.
After the START condition, the master sends a slave address. This address is seven bits long followed
by an eighth bit, which is the opcode bit (R/
W). A ‘one’ indicates the master will read data from the status
register. After the R/
W bit, the ’zero’ ACK bit is sent to the master by the device. The device now starts
sending the 8-bit status register data to the control register during the DATA bits time. After the DATA
bits, the ‘one’ ACK bit is sent to the device by the master. The master should send the STOP condition
after receiving the ACK bit.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 73S8010C-IMR/F | 功能描述:I2C 接口集成電路 Smart Card Interface ISO7816-3 & EVM4.0 RoHS:否 制造商:NXP Semiconductors 電源電壓-最大:5.5 V 電源電壓-最小:2.3 V 最大工作頻率:400 KHz 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-16 |
| 73S8010C-IMR/F1 | 功能描述:I2C 接口集成電路 RoHS:否 制造商:NXP Semiconductors 電源電壓-最大:5.5 V 電源電壓-最小:2.3 V 最大工作頻率:400 KHz 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-16 |
| 73S8010C-IMR/F2 | 功能描述:I2C 接口集成電路 RoHS:否 制造商:NXP Semiconductors 電源電壓-最大:5.5 V 電源電壓-最小:2.3 V 最大工作頻率:400 KHz 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-16 |
| 73S8010R | 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Low Cost Smart Card Interface |
| 73S8010R-DB | 功能描述:界面開發工具 73S8010R Demo Brd RoHS:否 制造商:Bourns 產品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
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