- 您現在的位置：買賣IC網 > PDF目錄68813 > 73S8023C-IMR (TERIDIAN SEMICONDUCTOR CORP) SPECIALTY ANALOG CIRCUIT, QCC32 PDF資料下載
參數資料
| 型號： | 73S8023C-IMR |
| 廠商： | TERIDIAN SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, QCC32 |
| 封裝： | 5 X 5 MM, QFN-32 |
| 文件頁數： | 2/27頁 |
| 文件大小： | 389K |
| 代理商： | 73S8023C-IMR |
第1頁當前第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁
73S8023C Data Sheet
DS_8023C_019
10
Rev. 1.5
6
Power Down
A power down function is provided via the PWRDN pin (active high). When activated, the Power Down
(PD) mode disables all the internal analog functions, including the card analog interface, the oscillators
and the DC-DC converter, to put the 73S8023C in its lowest power consumption mode. PD mode is only
allowed in the deactivated condition (out of a card session, when the
CMDVCC signal is driven high from
the host controller).
The host controller invokes the power down state when it is desirable to save power. The signals PRES
and
PRES remain functional in PD mode such that a card insertion sets OFF high. The micro-controller
must then set PWRDN low and wait for the internal stabilization time prior to starting any card session
(prior to turning
CMDVCC low).
Resumption of the normal mode occurs approximately 10 ms (stabilization of the internal oscillators and
reset of the circuitry) after PWRDN is set low. No card activation should be invoked during this 10 ms
time period. If a card is present,
OFF can be used as an indication that the circuit has completed its
recovery from power-down state.
OFF will go high at the end of the stabilization period. Should
CMDVCC go low during PWRDN = 1, or within the 10 ms internal stabilization / reset time, it will not be
taken into account and the card interface will remain inactive. Since
CMDVCC is taken into account on
its edges, it should be toggled high and low again after the 10 ms to activate a card.
Figure 2 illustrates the sequencing of the PD and Normal modes. PWRDN must be connected to GND if
the power down function is not used.
Figure 2: Power Down Mode Operation: CS = high
7
Over-temperature Monitor
A built-in detector monitors die temperature. When an over-temperature condition occurs, a card
deactivation sequence is initiated, and an error or fault condition is reported to the system controller.
PRES
OFF
PWRDN
Internal RC OSC
CMDVCC
OFF follows PRES regardless of PWRDN
PWRDN during a card
session has no effect
After setting PWRDN = 0,
the controller must wait at
least 10ms before setting
CMDVCC=0
EMV / ISO deactivation
time ~= 100 uS
~10ms
PWRDN has effect when
the cardi s deactivated
相關PDF資料 |
PDF描述 |
|---|---|
| 73S8023C-IMR | SPECIALTY ANALOG CIRCUIT, QCC32 |
| 73S8024C-IL/F | SPECIALTY ANALOG CIRCUIT, PDSO28 |
| 73S8024C-ILR/F | SPECIALTY ANALOG CIRCUIT, PDSO28 |
| 73S8024RN-ILR/F | SPECIALTY ANALOG CIRCUIT, PDSO28 |
| 73S8024RN-IL/F | SPECIALTY ANALOG CIRCUIT, PDSO28 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 73S8023C-IMR/F | 功能描述:輸入/輸出控制器接口集成電路 Smart Card Interface ISO7816-3 & EVM4.0 RoHS:否 制造商:Silicon Labs 產品: 輸入/輸出端數量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| 73S8023C-IMR/F1 | 功能描述:輸入/輸出控制器接口集成電路 RoHS:否 制造商:Silicon Labs 產品: 輸入/輸出端數量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| 73S8023C-IMR/F2 | 功能描述:輸入/輸出控制器接口集成電路 RoHS:否 制造商:Silicon Labs 產品: 輸入/輸出端數量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| 73S8023C-IMR/F3 | 功能描述:輸入/輸出控制器接口集成電路 Smart Card Interface ISO7816-3 & EVM4.0 RoHS:否 制造商:Silicon Labs 產品: 輸入/輸出端數量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| 73S8024C-DB | 功能描述:界面開發工具 73S8024C Demo Brd RoHS:否 制造商:Bourns 產品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
發布緊急采購，3分鐘左右您將得到回復。