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參數資料
| 型號： | 73S8024C-ILR/F |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO28 |
| 封裝： | LEAD FREE, SOP-28 |
| 文件頁數： | 2/22頁 |
| 文件大小： | 471K |
| 代理商： | 73S8024C-ILR/F |
73S8024C Data Sheet
DS_8024C_023
10
Rev. 1.3
The following steps and Figure 4 show the activation sequence and the timing of the card control signals
when the system controller pulls
CMDVCC low while RSTIN is high:
1.
CMDVCC is set low.
2.
Next, the internal VCC control circuit checks the presence of VCC at the end of t1. In normal operation,
the voltage VCC to the card becomes valid during this time. If not, OFF goes low to report a fault to
the system controller and the VCC
3.
After the fall of RSTIN at t
power to the card is shut down.
2
4.
CLK is applied to the card at the end of t
, turn I/O (AUX1, AUX2) to reception mode.
3
5.
RST is a copy of RSTIN after t
after I/O is in reception mode.
4. RSTIN may be set high before t 4, however the sequencer will not
set RST high until 42,000 clock cycles after the start of CLK.
Figure 4: Activation Sequence – RSTIN high when
CMDVCC goes low
9
Deactivation Sequence
Deactivation is initiated either by the system controller by setting the
CMDVCC high, or automatically in
the event of hardware faults. Hardware faults are over-current, overheating, VDD fault, VCC
The following steps and
fault, and card
extraction during the session.
Figure 5 show the deactivation sequence and the timing of the card control signals
when the system controller sets the
CMDVCC high or OFF goes low due to a fault or card removal:
1.
RST goes low at the end of time t1
2.
CLK is set low at the end of time t
.
2
3.
I/O goes low at the end of time t
.
3
4.
V
. Out of reception mode.
CC is turned off at the end of time t 4. After a delay t 5 (discharge of the VCC capacitor), VCC is low.
t1 = 0.510 ms (timing by 1.5MHz internal Oscillator)
t2 = 1.5 s, I/O goes to reception state
t3
≥ 0.5 s, CLK active
t4
≥ 42000 card clock cycles (time for RST to become the copy of RSTIN).
CMDVCC
VCC
IO
CLK
RSTIN
t1
t2
t3
t4
RST
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 73S8024RN | 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Low Cost Smart Card Interface |
| 73S8024RN-20IM/F | 功能描述:輸入/輸出控制器接口集成電路 Smart Card Interface ISO7816-3 & EVM4.0 RoHS:否 制造商:Silicon Labs 產品: 輸入/輸出端數量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| 73S8024RN-20IM/F1 | 功能描述:輸入/輸出控制器接口集成電路 Smart Card Interface ISO7816-3 & EVM4.0 RoHS:否 制造商:Silicon Labs 產品: 輸入/輸出端數量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| 73S8024RN-20IMR/F | 功能描述:輸入/輸出控制器接口集成電路 Smart Card Interface ISO7816-3 & EVM4.0 RoHS:否 制造商:Silicon Labs 產品: 輸入/輸出端數量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| 73S8024RN-20IMR/F1 | 功能描述:輸入/輸出控制器接口集成電路 Smart Card Interface ISO7816-3 & EVM4.0 RoHS:否 制造商:Silicon Labs 產品: 輸入/輸出端數量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
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