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參數(shù)資料
| 型號： | 74ACT2708 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 64 x 9 First-In, First-Out Memory |
| 中文描述： | 64 × 9先入先出存儲器 |
| 文件頁數(shù)： | 1/13頁 |
| 文件大小： | 95K |
| 代理商： | 74ACT2708 |
February 1989
Revised January 1999
7
1999 Fairchild Semiconductor Corporation
DS010144.prf
www.fairchildsemi.com
74ACT2708
64 x 9 First-In, First-Out Memory
General Description
The ACT2708 is an expandable first-in, first-out memory
organized as 64 words by 9 bits. An 85 MHz shift-in and 60
MHz shift-out typical data rate makes it ideal for high-speed
applications. It uses a dual port RAM architecture with
pointer logic to achieve the high speed with negligible fall-
through time.
Separate Shift-In (SI) and Shift-Out (SO) clocks control the
use of synchronous or asynchronous write or read. Other
controls include a Master Reset (MR) and Output Enable
(OE) for initializing the internal registers and allowing the
data outputs to be 3-STATE. Input Ready (IR) and Output
Ready (OR) signal when the FIFO is ready for I/O opera-
tions. The status flags HF and FULL indicate when the
FIFO is full, empty or half full.
The FIFO can be expanded to provide different word
lengths by tying off unused data inputs.
Features
I
64-words by 9-bit dual port RAM organization
I
85 MHz shift-in, 60 MHz shift-out data rate, typical
I
Expandable in word width only
I
TTL-compatible inputs
I
Asynchronous or synchronous operation
I
Asynchronous master reset
I
Outputs source/sink 8 mA
I
3-STATE outputs
I
Full ESD protection
I
Input and output pins directly in line for easy board lay-
out
I
TRW 1030 work-alike operation
Applications
High-speed disk or tape controllers
A/D output buffers
High-speed graphics pixel buffer
Video time base correction
Digital filtering
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Pin Assignment for DIP
Pin Descriptions
FACT
is a trademark of Fairchild Semiconductor Corporation.
Order Number
74ACT2708PC
Package Number
N28B
Package Description
28-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600” Wide
Pin Names
Description
D
0
–D
8
MR
Data Inputs
Master Reset
OE
Output Enable Input
SI
Shift-In
SO
Shift-Out
IR
Input Ready
OR
Output Ready
HF
Half Full Flag
FULL
Full Flag
O
0
–O
8
Data Outputs
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74ACT2708PC | 64 x 9 First-In, First-Out Memory |
| 74ACT818 | Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable Polarity 20-TVSOP -40 to 85 |
| 74ACT818SPC | Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable Polarity 20-SOIC -40 to 85 |
| 74ACTQ02 | CONNECTOR ACCESSORY |
| 74ACTQ02PC | CONNECTOR ACCESSORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ACT2708 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74ACT2708PC | 功能描述:先進(jìn)先出 64x9 (先進(jìn)先出) Memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時(shí)類型:Synchronous 組織:256 K x 18 最大時(shí)鐘頻率:100 MHz 訪問時(shí)間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| 74ACT273B | 功能描述:觸發(fā)器 USE 512-74ACT273PC RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74ACT273DWG | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 74ACT273DWR2 | 制造商: 功能描述: 制造商:undefined 功能描述: |
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