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參數(shù)資料
| 型號： | 74LVC1G3157DBVRE4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 多路復(fù)用及模擬開關(guān) |
| 英文描述： | 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO6 |
| 封裝： | GREEN, PLASTIC, SOT-23, 6 PIN |
| 文件頁數(shù)： | 21/25頁 |
| 文件大小： | 1045K |
| 代理商： | 74LVC1G3157DBVRE4 |
www.ti.com
Analog Switch Characteristics
Switching Characteristics
SINGLE-POLE, DOUBLE-THROW ANALOG SWITCH
SCES424F – JANUARY 2003 – REVISED FEBRUARY 2007
T
A = 25°C
FROM
TO
PARAMETER
TEST CONDITIONS
VCC
TYP
UNIT
(INPUT)
(OUTPUT)
1.65 V
300
Frequency
RL = 50 ,
2.3 V
300
response(1)
A or Bn
Bn or A
fin = sine wave
MHz
3 V
300
(switch on)
(see Figure 6 )
4.5 V
300
1.65 V
–54
Crosstalk(2)
RL = 50 ,
2.3 V
–54
(between
B1 or B2
B2 or B1
fin = 10 MHz (sine wave)
dB
3 V
–54
switches)
(see Figure 7 )
4.5 V
–54
1.65 V
–57
Feed-through
CL = 5 pF, RL = 50 ,
2.3 V
–57
attenuation(2)
A or Bn
Bn or A
fin = 10 MHz (sine wave)
dB
3 V
–57
(switch off)
(see Figure 8 )
4.5 V
–57
3.3 V
3
CL = 0.1 nF, RL = 1 M
Charge injection(3)
S
A
pC
(see Figure 9 )
5 V
7
1.65 V
0.1
VI = 0.5 Vp-p, RL = 600 ,
2.3 V
0.025
Total harmonic
A or Bn
Bn or A
fin = 600 Hz to 20 kHz (sine wave)
%
distortion
3 V
0.015
(see Figure 10 )
4.5 V
0.01
(1)
Adjust fin voltage to obtain 0 dBm at output. Increase fin frequency until dB meter reads –3 dB.
(2)
Adjust fin voltage to obtain 0 dBm at input.
(3)
Specified by design
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 5 and Figure 11)
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
VCC = 5 V
FROM
TO
± 0.15 V
± 0.2 V
± 0.3 V
± 0.5 V
PARAMETER
UNIT
(INPUT)
(OUTPUT)
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
tpd(1)
A or Bn
Bn or A
2
1.2
0.8
0.3
ns
ten(2)
7
24
3.5
14
2.5
7.6
1.7
5.7
S
Bn
ns
tdis(3)
3
13
2
7.5
1.5
5.3
0.8
3.8
tB-M(4)
0.5
ns
(1)
tpd is the slower of tPLH or tPHL. The propagation delay is calculated RC time constant of the typical on-state resistance of the switch and
the specified load capacitance when driven by an ideal voltage source (zero output impedance).
(2)
ten is the slower of tPZL or tPZH.
(3)
tdis is the slower of tPLZ or tPHZ.
(4)
Specified by design
5
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