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參數資料
| 型號： | 74VHC573 |
| 廠商： | 意法半導體 |
| 英文描述： | Hex Schmitt-Trigger Inverters 14-SOIC -40 to 85 |
| 中文描述： | 八路D型，3態輸出的非反相鎖存 |
| 文件頁數： | 5/14頁 |
| 文件大小： | 289K |
| 代理商： | 74VHC573 |
74VHC573
5/14
Table 7: AC Electrical Characteristics
(Input t
r
= t
f
= 3ns)
(*) Voltage range is 3.3V
±
0.3V
(**) Voltage range is 5.0V
±
0.5V
Note 1: Parameter guaranteed by design. t
soLH
= |t
pLHm
- t
pLHn
|, t
soHL
= |t
pHLm
- t
pHLn
|
Table 8: Capacitive Characteristics
1) C
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/8 (per Latch)
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
C
L
(pF)
T
A
= 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
t
PLH
t
PHL
Propagation Delay
Time
LE to Q
3.3
(*)
3.3
(*)
5.0
(**)
5.0
(**)
3.3
(*)
3.3
(*)
5.0
(**)
5.0
(**)
3.3
(*)
3.3
(*)
5.0
(**)
5.0
(**)
3.3
(*)
5.0
(**)
3.3
(*)
5.0
(**)
3.3
(*)
5.0
(**)
3.3
(*)
5.0
(**)
3.3
(*)
5.0
(**)
15
7.6
11.9
1.0
14.0
1.0
14.0
ns
50
10.1
15.4
1.0
17.5
1.0
17.5
15
5.0
7.7
1.0
9.0
1.0
9.0
50
6.5
9.7
1.0
11.0
1.0
11.0
t
PLH
t
PHL
Propagation Delay
Time
D to Q
15
7.0
11.0
1.0
13.0
1.0
13.0
ns
50
9.5
14.5
1.0
16.5
1.0
16.5
15
4.5
6.8
1.0
8.0
1.0
8.0
50
6.0
8.8
1.0
10.0
1.0
10.0
t
PZL
t
PZH
Output Enable
Time
15
R
L
= 1K
R
L
= 1K
R
L
= 1K
R
L
= 1K
R
L
= 1K
R
L
= 1K
7.3
11.5
1.0
13.5
1.0
13.5
ns
50
9.8
15.0
1.0
17.0
1.0
17.0
15
5.2
7.7
1.0
9.0
1.0
9.0
ns
50
6.7
9.7
1.0
11.0
1.0
11.0
t
PLZ
t
PHZ
Output Disable
Time
50
10.7
14.5
1.0
16.5
1.0
16.5
ns
50
6.7
9.7
1.0
11
1.0
11
t
w
Pulse Width (LE)
HIGH
5.0
5.0
5.0
ns
5.0
5.0
5.0
t
s
Setup Time D to LE
HIGH or LOW
3.5
3.5
3.5
ns
3.5
3.5
3.5
t
h
Setup Time D to LE
HIGH or LOW
1.5
1.5
1.5
ns
1.5
1.5
1.5
t
OSLH
t
OSHL
Output to Output
Skew time (note 1)
50
1.5
1.5
1.5
ns
50
1.0
1.0
1.0
Symbol
Parameter
Test Condition
Value
Unit
T
A
= 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
C
IN
Input Capacitance
Output
Capacitance
Power Dissipation
Capacitance
(note 1)
8
10
10
10
pF
C
OUT
10
pF
C
PD
29
pF
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| 74VHC573MTR | OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING |
| 74VHC573TTR | OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 74VHC573_07 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Octal D-Type Latch with 3-STATE Outputs |
| 74VHC573FT | 功能描述:IC LATCH OCTAL D-TYPE 20-TSSOP 制造商:toshiba semiconductor and storage 系列:74VHC 包裝:剪切帶（CT） 零件狀態:在售 邏輯類型:D 型鎖存器 電路:8：8 輸出類型:三態 電壓 - 電源:2 V ~ 5.5 V 獨立電路:1 延遲時間 - 傳播:6.5ns 電流 - 輸出高，低:8mA，8mA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商器件封裝:20-TSSOP 基本零件編號:74VHC573 標準包裝:1 |
| 74VHC573FT(BE) | 制造商:Toshiba America Electronic Components 功能描述:IC LATCH OCTAL D-TYPE 20-TSSOP |
| 74VHC573M | 功能描述:閉鎖 Octal D-Type Latch RoHS:否 制造商:Micrel 電路數量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74VHC573M | 制造商:Fairchild Semiconductor Corporation 功能描述:74VHC CMOS SMD 74VHC573 SOIC20 |
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