- 您現在的位置：買賣IC網 > PDF目錄369338 > 74VHCT573A (意法半導體) Octal Transparent D-Type Latches With 3-State Outputs 20-SOIC -40 to 85 PDF資料下載
參數資料
| 型號： | 74VHCT573A |
| 廠商： | 意法半導體 |
| 英文描述： | Octal Transparent D-Type Latches With 3-State Outputs 20-SOIC -40 to 85 |
| 中文描述： | 八路D型，3態輸出的非反相鎖存 |
| 文件頁數： | 1/10頁 |
| 文件大小： | 74K |
| 代理商： | 74VHCT573A |
74VHCT573A
OCTAL D-TYPE LATCH
WITH 3 STATE OUTPUT NON INVERTING
February 2000
I
HIGHSPEED:t
PD
=5.4ns(TYP.)atV
CC
= 5V
I
LOWPOWERDISSIPATION:
I
CC
=4
μ
A(MAX.) at T
A
=25
o
C
I
COMPATIBLEWITH TTL OUTPUTS:
V
IH
=2V (MIN),V
IL
= 0.8V(MAX)
I
POWERDOWN PROTECTIONON INPUTS&
OUTPUTS
I
SYMMETRICALOUTPUTIMPEDANCE:
|I
OH
| = I
OL
= 8 mA(MIN)
I
BALANCEDPROPAGATIONDELAYS:
t
PLH
t
PHL
I
OPERATINGVOLTAGERANGE:
V
CC
(OPR)= 4.5Vto 5.5V
I
PINANDFUNCTION COMPATIBLEWITH
74SERIES573
I
IMPROVEDLATCH-UP IMMUNITY
I
LOWNOISE:V
OLP
= 0.9V(Max.)
DESCRIPTION
The 74VHCT573A is an advanced high-speed
CMOS OCTAL D-TYPE LATCH with 3 STATE
OUTPUT
NON
INVERTING
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
This 8 bit D-Type latch is controlled by a latch
enable input (LE) and an output enable input
(OE).
fabricated
with
While the LE input is held at a high level, the Q
outputswill follow the data inputs precisely.
When the LE is taken low, the Q outputs will be
latchedpreciselyat thelogic level of D input data.
While the (OE) input is low, the 8 outputs will be
in a normal logic state (high or low logic level)
and while high level the outputs will be in a high
impedancestate.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface5V to 3V.
All
inputs
and
outputs are
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
equipped with
PIN CONNECTION AND IEC LOGIC SYMBOLS
SOP
TSSOP
ORDER CODES
TUBE
74VHCT573AM
PACKAGE
SOP
TSSOP
T & R
74VHCT573AMTR
74VHCT573ATTR
1/10
相關PDF資料 |
PDF描述 |
|---|---|
| 74VHCT573ATTR | OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING |
| 74VHCT573AM | OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING |
| 74VHCT573AMTR | OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING |
| 74VHCT573 | Octal D-Type Latch with 3-STATE Outputs |
| 74VHCT573A | Octal D-Type Latch with 3-STATE Outputs |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 74VHCT573AFT | 功能描述:IC LATCH OCTAL D-TYPE 20-TSSOP 制造商:toshiba semiconductor and storage 系列:74VHCT 包裝:剪切帶（CT） 零件狀態:在售 邏輯類型:D 型鎖存器 電路:8：8 輸出類型:三態 電壓 - 電源:4.5 V ~ 5.5 V 獨立電路:1 延遲時間 - 傳播:8.5ns 電流 - 輸出高，低:8mA，8mA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商器件封裝:20-TSSOP 基本零件編號:74VHCT573 標準包裝:1 |
| 74VHCT573AFT(BE) | 制造商:Toshiba America Electronic Components 功能描述:IC LATCH OCTAL D-TYPE 20-TSSOP |
| 74VHCT573AM | 功能描述:閉鎖 Octal D-Type Latch RoHS:否 制造商:Micrel 電路數量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74VHCT573AM_Q | 功能描述:閉鎖 Octal D-Type Latch RoHS:否 制造商:Micrel 電路數量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74VHCT573AMTC | 功能描述:閉鎖 Octal D-Type Latch RoHS:否 制造商:Micrel 電路數量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
發布緊急采購，3分鐘左右您將得到回復。