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參數資料
| 型號： | 9179BF-01LF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 91 SERIES, LOW SKEW CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數： | 3/10頁 |
| 文件大小： | 176K |
| 代理商： | 9179BF-01LF |
2
ICS9179B-01
Pin Descriptions
Power Groups
VDD = Power supply for SDRAM buffer
VDDS = Power supply for I
2C circuitry
PIN NUMBER
PIN NAME
TYPE DESCRIPTION
4, 5, 8, 9
SDRAM (0:3)
OUT
SDRAM Byte 0 clock outputs1
13, 14, 17, 18
SDRAM (4:7)
OUT
SDRAM Byte 1 clock outputs1
31, 32, 35, 36
SDRAM (8:11)
OUT
SDRAM Byte 2 clock outputs1
40, 41, 44, 45
SDRAM (12:15)
OUT
SDRAM Byte 3 clock outputs1
21, 28
SDRAM (16:17)
OUT
SDRAM clock outputs useable for feedback.1
11
BUF_IN
IN
Input for buffers
38
OE
IN
Tri-states all outputs when held LOW. Has internal
pull-up.2
24
SDATA
I/O
Data pin for I2C circuitry3
25
SCLK
I/O
Clock pin for I2C circuitry3
3, 7, 12, 16,
20, 29, 33, 37,
42, 46
VDD
PWR 3.3V Power supply for SDRAM buffer
6, 10, 15, 19,
22, 27, 30, 34,
39, 43
GND
PWR Ground for SDRAM buffer
23
VDDS
PWR 3.3V Power supply for I2C circuitry
26
GNDS
PWR Ground for I2C circuitry
1, 2, 47, 48
N/C
-
Pins are not internally connected
Notes:
1.
At power up all eighteen SDRAM outputs are enabled and active.
2.
OE has a 100K Ohm internal pull-up resistor to keep all outputs active.
3.
The SDATA and SCLK inputs both also have internal pull-up resistors with values above 100K Ohms as well
for complete platform flexibility.
Ground Groups
GND = Ground for SDRAM buffer
GNDS = Ground for I
2C circuitry
相關PDF資料 |
PDF描述 |
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| 9179BF-01T | 9179 SERIES, LOW SKEW CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 9179BF-01LFT | 9179 SERIES, LOW SKEW CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 9179BF-01 | 9179 SERIES, LOW SKEW CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 9179BF-03LF-T | 9179 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 9179BF-03LF | 9179 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
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