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參數資料
| 型號： | 9214YGLF-T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 9214 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 4.40 MM, 0.65 MM PITCH, LEAD FREE, MO-153, TSSOP-28 |
| 文件頁數： | 12/16頁 |
| 文件大小： | 224K |
| 代理商： | 9214YGLF-T |
5
Integrated
Circuit
Systems, Inc.
ICS9214
0809G—08/02/08
Device ID and SMBus Device Address
The device ID (SMB_A(1:0)) is part of the SMBus device address. The least significant bit of the address designates a write
or read operation. Table 3 shows the addresses for four ICS9214 devices on the same SMBus.
PLL Multiplier
Table 2 shows the frequency multipliers in the PLL, selectable by programming the MULT0, MULT1 and MULT2 bits in the
SMBus Multiplier Control register. Power up default is 4.
Table 2. PLL Multiplier Selection
Bit 6
Bit 5
Bit 4
MULT2
MULT1
MULT0
00
03
3003
400
00
14
4002
533
0
1
0
5
500
667
0
1
6
600
800
10
08
800
-3
1
0
1
9/2
450
600
1
0
15/2
750
-3
1
15/4
375
500
NOTES
1 Output frequencies are based on nominal input frequencies of 100 MHz and 133 MHz. The PLL
multipliers are also applicable to spread spectrum modulated input clocks.
2 Default muliplier value at power up
3 Outputs at these settings do not conform to the AC Output Characteristics, or are not supported.
4 Shaded areas are under development and are not yet supported
Byte 0
Output Frequency (MHz)
Frequency
Multiplier
CLK_INT/C =
100 MHz
1
CLK_INT/C =
133 MHz
1
Table 3. SMBus Device Addresses
Device
Operation
SMB_A1
SMB_A0
WR#/RD
Write
D8
0
Read
D9
1
Write
DA
0
Read
DB
1
Write
DC
0
Read
DD
1
Write
DE
0
Read
DF
1
0
2
ICS9214
Hex Address
0
1
3
8-bit SMBus Device Address, Including Oper.
1
11011
1
0
01
10
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